Method for power-on self-test process of computer system

A method for a power-on self-test (POST) process of a computer system that includes a baseboard management controller (BMC), the computer system supporting dual basic input/output system (BIOS) and storing a default BIOS image and a golden BIOS image, the computer system supporting a first specific interface and a second specific interface that are different from each other, the method to be implemented by the BMC and comprising steps of:

• upon receiving a power-on signal, loading one of the default BIOS image and the golden BIOS image, and simultaneously starting a first timer that is configured to count a first preset timeout period and a second timer that is configured to count a second preset timeout period which is longer than the first preset timeout period;
• determining whether a POST code is received via the first specific interface before the first timer times out;
• executing a BIOS recovery procedure in response to determining that no POST code is received via the first specific interface before the first timer times out;
• determining whether a signal received via the second specific interface has one of a rising edge and a falling edge before the second timer times out;
• and
• executing the BIOS recovery procedure in response to determining that the signal received via the second specific interface has neither the rising edge nor the falling edge before the second timer times out.