Integrated circuit device with reduced N-P boundary effect

An integrated circuit (IC) device, comprising:

• a first semiconductor structure comprising a P-type semiconductor material;
• a second semiconductor structure comprising a N-type semiconductor material, wherein the second semiconductor structure has a longitudinal axis that is along a first direction and is substantially parallel to a longitudinal axis of the first semiconductor structure;
• an electrical insulator over the first semiconductor structure and the second semiconductor structure in a second direction substantially perpendicular to the first direction;
• and
• a conductive structure comprising a N-type conductive material,
• wherein a first portion of the conductive structure is over a portion of the first semiconductor structure in the second direction, and a second portion of the conductive structure is over a portion of the electrical insulator in the second direction.

An integrated circuit (IC) device, comprising:

• a gate structure comprising a first portion and a second portion, the first portion crossing a first semiconductor structure, the second portion crossing a second semiconductor structure;
• a P-type transistor comprising a portion of the first semiconductor structure;
• a first N-type transistor comprising a first portion of the second semiconductor structure;
• and
• a second N-type transistor comprising a second portion of the second semiconductor structure, wherein at least part of the second portion of the second semiconductor structure is over at least part of the second portion of the gate structure.