High noise immunity TRIAC structure

A triode for alternating current semiconductor comprising:

• a continuous N− region sandwiched between a first P region and a second P region, wherein the first P region is coupled to an MT2 terminal and the second P region is coupled to a first MT1 terminal and a second MT1 terminal;
• a first plurality of N+ regions disposed within the first P region;
• a second plurality of N+ regions disposed within the second P region;
• and
• a trench disposed adjacent to and directly between a first gate terminal and a second gate terminal to separate the first gate terminal and the second gate terminal, wherein a first N+ region of the second plurality of N+ regions is disposed beneath the first gate terminal and a second N+ region of the second plurality of N+ regions is disposed beneath the second gate terminal, wherein the trench is disposed adjacent to and directly between the first N+ region and the second N+ region to cut through the second plurality of N+ regions, wherein the trench is disposed directly adjacent to the second P region to cut through the second P region, and wherein the trench is disposed directly adjacent to the continuous N− region to cut into, but not through the continuous N− region.