Clock sync input dropout protection
AssigneeTexas Instruments Incorporated
InventorsChung San Roger Chan, John Mitchell Perry, Ari Arie Levy, Nghia Trong Tang
Life of this patent
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Abstract
In a described example, a circuit includes a pulse generator having an input and an output and an oscillator having an output. The circuit also includes a logic circuit having a first input, a second input, and an output, the first input of the logic circuit coupled to the output of the pulse generator, and the second input of the logic circuit coupled to the output of the pulse generator. Additionally, the circuit includes an output circuit having a first input, a second input, a third input and an output, the second input of the output circuit coupled to the output of the logic circuit.
Claims24
A circuit comprising:
- a pulse generator having an input and an output;
- and
- an oscillator having an input and an output, the input of the oscillator coupled to the input of the pulse generator;
- and
- an output circuit having a first input, a second input, a third input and an output, the first input of the output circuit coupled to an external clock input, the second input coupled to the outputs of the pulse generator and the oscillator, and the output of the output circuit coupled to a clock output, the output circuit configurable to:
- receive a control signal at the third input;
- provide a combination of a pulse generator output signal and an oscillator output signal to the clock output responsive to the control signal having a first state;
- and
- provide an external clock signal to the clock output responsive to the control signal having a second state.
A circuit comprising:
- a pulse generator having an input and an output;
- and
- an oscillator having an output;
- a logic circuit having a first input, a second input, and an output, the first input of the logic circuit coupled to the output of the pulse generator, and the second input of the logic circuit coupled to the output of the oscillator;
- a synchronization control circuit having an input, a first output, and a second output, the input of the synchronization control circuit capable of receiving an external clock signal, and the first output of the synchronization control circuit coupled to the input of the pulse generator;
- and
- an output circuit having a first input, a second input, a third input, and an output, the first input of the output circuit coupled to the input of the synchronization control circuit, the second input of the output circuit coupled to the output of the logic circuit, and the third input of the output circuit coupled to the second output of the synchronization control circuit.
A system comprising:
- a sync pin;
- a clock generator having an output;
- an output circuit having a first input, a second input, and an output, the first input coupled to the sync pin, and the second input coupled to the output of the clock generator;
- and
- a power stage having an input coupled to the output of the output circuit, the output circuit configurable to;
- receive a control signal at the first input;
- receive a pulse generator output signal and a clock generator output signal at the second input;
- provide a combination of the pulse generator output signal and the clock generator output signal to the input of the power stage responsive to the control signal having a first state;
- and
- provide an external clock signal to the input of the power stage responsive to the control signal having a second state.
Dependencies are inferred from the claim text.