Silicon brain

A semiconductor device, which includes a module comprising:

• first and second units, which are connected in series along first axis;
• second, third, fourth and fifth word-lines, which are expanded along second axis;
• first and sixth word lines, which are expanded along third axis;
• first and third bit lines, which are expanded along the second axis;
• and
• second bit lines, which are expanded along the third axis;
• wherein said second bit line connects both said first and second units,
• said first unit comprises first, second and third cells,
• said first, second and third cells are connected in series along said first axis,
• said first, second and third cells have a control gate, respectively,
• said first cell has a source,
• said third cell has a drain;
• wherein the control gate of said first cell is connected to said first word line,
• the control gate of said second cell is connected to said second word line,
• the control gate of said third cell is connected to said third word line;
• wherein the source of said first cell is connected to said first bit line,
• the drain of said third cell is connected to said second bit line;
• wherein said second unit comprises fourth, fifth, and sixth cells,
• said fourth, fifth and sixth cells are connected in series along said first axis,
• said fourth, fifth and sixth cells have a control gate, respectively,
• said fourth cell has a source,
• said sixth cell has a drain;
• wherein the control gate of said fourth cell is connected to said fourth word line,
• the control gate of said fifth cell is connected to said fifth word line,
• the control gate of said sixth cell is connected to said sixth word line,
• the source of said fourth cell is connected to said second bit line,
• the drain of said sixth cell is connected to said third bit line.