Nanosheet 3D transistor for advanced memory elements

A semiconductor device, comprising:

• a first metal structure extending in a first lateral direction, and including a first portion and a second portion connected to each other with a third portion;
• a first ferroelectric layer surrounding the first portion of the first metal structure;
• a first channel layer surrounding the first ferroelectric layer;
• a first gate structure extending in a second lateral direction perpendicular to the first lateral direction, and surrounding the first portion of the first metal structure with the first ferroelectric layer and the first channel layer interposed therebetween;
• a first gate electrode in electrical contact with the first gate structure;
• and
• a second gate electrode in electrical contact with the second portion of the first metal structure.

A method for fabricating semiconductor devices, comprising:

• providing a stack including a metal structure extending in a first lateral direction;
• separating the metal structure into a first portion and a second portion;
• connecting the first portion and the second portion with a third portion;
• sequentially surrounding the first portion with a ferroelectric layer, a semiconductive-behaving layer, and a gate structure that extends in a second lateral direction;
• and
• forming a first gate electrode and a second gate electrode to contact the first portion and the second portion, respectively.