US 12,738,944 B2Granted

Systems and methods for realizing high-speed low-power wireline transceivers

AssigneeSharif University of Technology

InventorFatemeh Akbar

Life of this patent

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Abstract

Decoding an encoded data stream comprises receiving an encoded data stream x(n), and a number M of same-rate data streams x1, x2, . . . , xM, where each bit has a period of Tsym. A clock pulse signal in the received data stream includes a plurality of pulses each with a time duration corresponding to T s ⁢ y ⁢ m M , along with a number M of orthogonal pulse signals. The M orthogonal pulse signals are extracted from the received data stream and the unencoded rth bit within an rth symbol period of the M data streams is decoded concurrently, through multiplying the received encoded data stream, where a kth clock pulse signal corresponds to a kth data stream k varies from 1 to M. The results are integrated over the rth symbol period such that x k ( r ) = ∫ r ⁢ T s ⁢ y ⁢ m ( r + 1 ) ⁢ T s ⁢ y ⁢ m z ⁡ ( t ) × p k ( t ) ⁢ dt , where z(t) is the received encoded data stream at the decoder's input.

Claims6

Dependent claims

An apparatus comprising:

decoder circuitry configured to decode an encoded data stream, the decoder circuitry including circuitry configured to:
receive the encoded data stream, the encoded data stream comprising M orthogonal clock pulse signals pk, k varying from 1 to M;
extract the M orthogonal clock pulse signals pk from the received encoded data stream;
and
decode an rth bit of M data streams x1, x2, . . . , and xM, concurrently, by
multiplying the received encoded data stream by p1, p2, . . . , and pM, respectively, and
integrating the results over an rth symbol period Tsym such that
x
k
(
r
)
=
∫
r
⁢
T
s
⁢
y
⁢
m
(
r
+
1
)
⁢
T
s
⁢
y
⁢
m
z
⁡
(
t
)
×
p
k
(
t
)
⁢
dt
,
where z(t) denotes the received encoded data stream;
where the encoded data stream is encoded by
receiving an aggregation of a data stream, the data stream including
an integer number M≥2 of same-rate data streams, each data stream in the M same-rate data streams having an ordered number of bits;
and
a clock pulse signal including a plurality of pulses where each pulse in the plurality of pulses corresponds to one bit in the aggregated data stream;
outputting the M data streams, each data stream in the M data streams having a data rate M times lower than that of the aggregated data stream;
using the M data streams to generate a high speed encoded data stream having an ordered number of bits being generated by multiplying a data stream in the ordered number M of same-rate data streams by a corresponding clock pulse signal in the ordered number M of orthogonal clock pulse signals to provide M results, and
summing the M results.

54 more elements

A method for decoding an encoded data stream, comprising:

receiving the encoded data stream, the encoded data stream including M orthogonal clock pulse signals,
extracting the M orthogonal clock pulse signals from the received encoded data stream;
and
decoding the unencoded rth bit within an rth symbol period of the M data streams concurrently, through multiplying the received encoded data stream at the input of a decoder by the M orthogonal clock pulse signals, where a kth clock pulse signal corresponds to a kth data stream, k varying from 1 to M, and integrating the results over the rth symbol period such that
x
k
(
r
)
=
∫
r
⁢
T
s
⁢
y
⁢
m
(
r
+
1
)
⁢
T
s
⁢
y
⁢
m
z
⁡
(
t
)
×
p
k
(
t
)
⁢
d
⁢
t
,
where z(t) denotes the received encoded data stream at the decoder's input, where Tsym denotes the time duration of one unit of information, where pk(t) denotes a clock pulse signal at a particular time t,
and where the received encoded data stream has been, prior to being decoded, encoded by
receiving an aggregation of a data stream, the data stream including an integer number M≥2 of same-rate data streams x1, x2, . . . , and xM, each data stream in the M same-rate data streams having an ordered number of bits, and a clock pulse signal including a plurality of pulses where each pulse in the plurality of pulses corresponds to one bit in the aggregated data stream;
outputting the M data streams, each data stream in the M data streams having a data rate M times lower than that of the aggregated data stream;
using the outputted M data streams to generate a high speed encoded data stream having an ordered number of bits being generated by multiplying a data stream in the ordered number M of same-rate data streams by a corresponding clock pulse signal in the ordered number M of orthogonal clock pulse signals to provide M results, and
summing the M results.

50 more elements

Dependencies are inferred from the claim text.

Facts

Application: 19/570,565Filed 18 Mar 2026 · continuation
Priority: 10 Mar 2024
Published: US 2026/0213753 A123 Jul 2026
Granted: 15 Sep 2026
Term ends: Not estimatedThe source records don’t support an estimate.

Classification3 codes

H03K 23/64
Pulse counters comprising counting chains; Frequency dividers comprising counting chains: with a base or radix other than a power of two
H03K 5/05
By increasing duration; by decreasing duration: by the use of clock signals or other time reference signals
H03K
Pulse technique

Family

Application18/600,748Parent of this continuation · filed 10 Mar 2024
US 2026/0213753 A1Pre-grant publication · published 23 Jul 2026
US 12,609,705 B2Parent of this continuation
US 2025/0286556 A1Published application
US 12,738,944 B2This patent

From the US filing history. Foreign family members aren’t listed.