Offset reduction for switched capacitor circuitry
AssigneeApple Inc.
InventorLong Kong
Life of this patent
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Abstract
A switched capacitor circuit is provided that may include a first capacitor, a second capacitor, one or more switches coupled between the first and second capacitors, and a first output switch coupled between the first capacitor and a first output terminal. The one or more switches can be controlled by a first pulse signal, and the first output switch can be controlled by a second pulse signal different than the first pulse signal. The switched capacitor circuit can further include a second output switch coupled between the second capacitor and a second output terminal different than the first output terminal. The second output switch can also be controlled by the second pulse signal. The second pulse signal can overlap only a portion of the first pulse signal.
Claims19
A switched capacitor circuit comprising:
- a first capacitor;
- a second capacitor;
- one or more switches coupled between the first and second capacitors;
- and
- a first output switch coupled between the first capacitor and a first output terminal, wherein:
- the one or more switches are controlled by a first pulse signal having a first activation period;
- and
- the first output switch is controlled by a second pulse signal having a second activation period shorter than the first activation period.
A method of operating a switched capacitor circuit, comprising:
- storing a voltage on a first capacitor of the switched capacitor circuit;
- storing a voltage on a second capacitor of the switched capacitor circuit;
- asserting a first control signal to selectively couple the first and second capacitors in series;
- and
- while the first control signal is asserted, asserting a second control signal, different than the first control signal, to selectively couple the first and second capacitors to an output of the switched capacitor circuit.
Switched capacitor circuitry comprising:
- a plurality of switched capacitor circuits coupled in parallel between an input and an output of the switched capacitor circuitry;
- and
- a load capacitor coupled across the output and shared among the plurality of switched capacitor circuits, wherein at least one switched capacitor circuit in the plurality of switched capacitor circuits comprises:
- a first capacitor;
- a second capacitor;
- one or more first switches configured to selectively couple the first capacitor to the input;
- one or more second switches configured to selectively couple the second capacitor to the input;
- one or more third switches configured to selectively couple the first and second capacitors in series;
- and
- one or more fourth switches configured to selectively couple the first and second capacitors to the output.
Dependencies are inferred from the claim text.