Semiconductor device and fabricating method thereof

A fabricating method of a semiconductor device, comprising:

• forming a source structure and a drain structure, the source structure and the drain structure stacked in a vertical direction;
• forming a gate structure, the gate structure being formed between the drain structure and the source structure in the vertical direction;
• forming a channel structure, the channel structure being formed between the drain structure and the source structure in the vertical direction and electrically connected the drain structure and the source structure, the channel structure being partially disposed in the gate structure and comprising a channel layer and an insulating layer stacked sequentially in a horizontal direction;
• forming a gate dielectric layer, the gate dielectric layer being formed between the channel structure and the gate structure in the horizontal direction;
• and
• forming a metal nitride layer, between the gate dielectric layer and the gate structure, wherein the metal nitride layer comprises a conductive barrier material, wherein a top surface of the metal nitride layer is higher than a top surface of the gate structure.

A semiconductor device, comprising:

• a source structure;
• a drain structure, the source structure and the drain structure stacked disposed in a vertical direction;
• a gate structure disposed between the drain structure and the source structure in the vertical direction;
• a bottom dielectric layer, disposed between the drain structure and the source structure in the vertical direction;
• a channel structure, disposed between the drain structure and the source structure in the vertical direction and electrically connected the drain structure and the source structure, the channel structure being partially disposed in the gate structure and comprising a channel layer and an insulating layer stacked sequentially in a horizontal direction;
• a gate dielectric layer, disposed between the channel structure and the gate structure in the horizontal direction;
• and
• a metal nitride layer, disposed between the gate dielectric layer and the gate structure, wherein a portion of the bottom dielectric layer is sandwiched between the metal nitride layer and the source structure, and the gate dielectric layer directly contacts a top surface of the metal nitride layer.