Power switching device operable to reduce on- resistance and extend short circuit withstand time
AssigneeSemiconductor Components Industries, LLC
InventorKe Zhu
Life of this patent
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Abstract
A power switching device is disclosed. The power switching device includes a cascode switching circuit comprising a normally-on transistor and a normally-off transistor provided in a cascode topology. The power switching device also includes a gate driver circuit configured to apply a positive bias voltage at a respective gate terminal of the normally-on transistor under a normal operating condition, and to apply a negative bias voltage at the respective gate terminal of the normally-on transistor under a short circuit condition.
Claims20
A power switching device comprising:
- a cascode switching circuit comprising a normally-on transistor and a normally-off transistor provided in a cascode topology;
- and
- a gate driver circuit configured to:
- apply a positive bias voltage at a respective gate terminal of the normally-on transistor under a normal operating condition;
- and
- apply a negative bias voltage at the respective gate terminal of the normally-on transistor under a short circuit condition.
An electronic power system comprising a conversion circuit coupled between a power source and a load circuit, the conversion circuit including a power switching device comprising:
- a cascode switching circuit comprising a normally-on transistor and a normally-off transistor provided in a cascode topology;
- and
- a gate driver circuit configured to:
- apply a positive bias voltage at a respective gate terminal of the normally-on transistor under a normal operating condition;
- and
- apply a negative bias voltage at the respective gate terminal of the normally-on transistor under a short circuit condition.
A method for operating a power switching device comprising a normally-on transistor and a normally-off transistor configured in a cascode topology:
- applying a positive bias voltage at a respective gate terminal of the normally-on transistor under a normal operating condition;
- and
- applying a negative bias voltage at the respective gate terminal of the normally-on transistor under a short circuit condition.
Dependencies are inferred from the claim text.