Semiconductor protection devices with high area efficiency

A semiconductor device, comprising:

• a first diode including a first pn junction across a p-doped region and a first n-well including the p-doped region, wherein the first n-well is coupled to a first terminal and the p-doped region is coupled to a second terminal;
• a second diode including a second pn junction across a p-well and a second n-well adjacent to the p-well, wherein the second n-well includes a n-doped region having a greater concentration of n-type dopants than the second n-well, wherein the p-well is coupled to the first terminal and the second n-well is coupled to the second terminal through the n-doped region;
• a third n-well of an isolation structure surrounding the semiconductor device, the second n-well disposed over the third n-well;
• and
• a p-type semiconductor layer, wherein the first n-well, the second n-well, and the p-well interface with the p-type semiconductor layer.

A semiconductor device, comprising:

• a first diode including a first pn junction across a p-doped region and a first n-well including the p-doped region, wherein the first n-well is coupled to a first terminal and the p-doped region is coupled to a second terminal;
• a second diode including a second pn junction across a p-well and a second n-well adjacent to the p-well, wherein the p-well is coupled to the first terminal and the second n-well is coupled to the second terminal;
• and
• an isolation structure surrounding the semiconductor device, the isolation structure including a deep n-well interfacing with the second n-well, the deep n-well being spaced apart from the p-well and the first n-well.