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AssigneeTexas Instruments Incorporated
InventorsBharath Kumar Singareddy, Srinivas Theertham, Abhijit Bhattacharya, Visvesvaraya Appala Pentakota, Manoj Katta Venkata, Soumi Paul
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An apparatus includes a first D flip-flop including a first data output, a first negative edge-triggered clock input, and a first reset input, and a second D flip-flop including a second data output, a second negative edge-triggered clock input, and a second reset input. The apparatus includes a logic gate having an output and first and second inputs, the first input of the logic gate coupled to the first data output, and the second input of the logic gate coupled to the second data output, in which the output of the logic gate is configured to be a first clock output of the apparatus. A delay circuit of the apparatus includes an output and input, the output of the delay circuit coupled to the first and second reset inputs, and the input of the delay circuit coupled to the output of the logic gate.
An electronic device, comprising:
Dependencies are inferred from the claim text.