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US 12,713,685 B2Granted
Method and structure for reduced substrate loss for GaN devices
AssigneeTexas Instruments Incorporated
InventorEbenezer Eshun
Life of this patent
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Abstract
An integrated circuit includes a GaN layer located over a semiconductor substrate. The GaN layer includes an active device region of the GaN layer having a first conductivity and a passive device region of the GaN layer having a smaller second conductivity. A transistor may be located over the GaN layer in the active device region, and a passive device may be located over the GaN layer in the passive device region.
Claims18
A method of forming an integrated circuit, comprising:
- forming a GaN layer over a semiconductor substrate;
- decreasing conductivity of the GaN layer in a passive device region by amorphizing the GaN layer in the passive device region;
- and
- forming a GaN transistor in an active device region of the GaN layer, the decreasing the conductivity of the GaN layer including:
- forming a plurality of first voids in a first dielectric layer that overlies the GaN layer, the first voids extending through the first dielectric layer and into the GaN layer;
- filling a top portion of the first voids with a first dielectric filler, while leaving an unfilled lower portion of the first voids;
- forming a plurality of second voids in a second dielectric layer that overlies the first dielectric layer;
- and
- filling the second voids with a second dielectric filler.
6 more elements
A method of forming an integrated circuit, comprising:
- forming a GaN layer over a semiconductor substrate;
- amorphizing the GaN layer in a passive device region;
- forming a plurality of first voids in a first dielectric layer that overlies the passive device region, the first voids extending through the first dielectric layer and into the GaN layer;
- filling a top portion of the first voids with a first dielectric filler, while leaving an unfilled lower portion of the first voids;
- forming a plurality of second voids in a second dielectric layer that overlies the first dielectric layer;
- filling the second voids with a second dielectric filler;
- and
- forming a GaN transistor in an active device region of the GaN layer.
5 more elements
Dependencies are inferred from the claim text.