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US 12,712,468 B2Granted
Switching circuit
AssigneeGeneral Electric Company
InventorsZheyu Zhang, Satish Prabhakaran
Life of this patent
Estimating the term…
Abstract
A switching circuit is provided. The switching circuit includes a first stage, a second stage, a decoupling inductor, a decoupling capacitor, and a semiconductor switch coupled between the first stage and the second stage. The first stage is configured to be coupled to a first bus. The second stage is configured to be coupled to a second bus. The decoupling inductor is coupled to the second stage, and the decoupling capacitor is coupled to the first stage. The semiconductor switch is configured to be controlled to convert a first current received at the first stage to a second current supplied to the second stage.
Claims19
A switching circuit, comprising:
- a first stage configured to be coupled directly to a first line and a second line of a first bus;
- a second stage configured to be coupled to a second bus;
- a decoupling inductor coupled to said second stage;
- a decoupling capacitor coupled across said first stage directly between the first line and the second line;
- a semiconductor switch system comprising a first semiconductor switch and a second semiconductor switch coupled between said first stage and said second stage and configured to be controlled to convert a first current received at said first stage to a second current supplied to said second stage;
- and
- a gate driver circuit system coupled to and configured to operate said semiconductor switch system, said gate driver circuit system comprising a first gate driver circuit coupled to said first semiconductor switch and a second gate driver circuit coupled to said second semiconductor switch,
- wherein said switching circuit is configured to be coupled in parallel with a plurality of other switching circuits that each include an associated first semiconductor switch, an associated second semiconductor switch, and an associated decoupling capacitor, each decoupling capacitor configured to suppress transmission of parasitic currents to the other switching circuits,
- wherein said first gate driver circuit is coupled to the associated first semiconductor switch of each of the plurality of other switching circuits and configured to provide a first control signal to the first semiconductor switch and the associated first semiconductor switch of each of the plurality of other switching circuits,
- wherein said second gate driver circuit is coupled to the associated second semiconductor switch of each of the plurality of other switching circuits and configured to provide a second control signal to the second semiconductor switch and the associated second semiconductor switch of each of the plurality of other switching circuits, and
- wherein said first gate driver circuit and said second gate driver circuit are controlled independently to (i) synchronize control of said first semiconductor switch and the associated first semiconductor switch of each of the plurality of other switching circuits using the first control signal, (ii) synchronize control of said second semiconductor switch and the associated second semiconductor switch of each of the plurality of other switching circuits using the second control signal, and (iii) provide substantially equal current sharing among said switching circuit and the plurality of other switching circuits.
8 more elements
A paralleled switching circuit, comprising:
- a first bus configured to supply a first current, the first bus comprising a first line and a second line;
- a second bus configured to receive a second current;
- a plurality of phase legs respectively coupled between said first bus and said second bus, each phase leg comprising a switching circuit configured to conduct a share of a total current supplied in the second current, each said switching circuit comprising:
- a decoupling capacitor coupled directly to said first line and said second line of said first bus, the decoupling capacitor configured to suppresses transmission of parasitic currents from the associated switching circuit to the switching circuits of other phase legs of the plurality of phase legs;
- a semiconductor switch system comprising a first semiconductor switch and a second semiconductor switch coupled between said first bus and said second bus, said semiconductor switch system configured to be controlled to convert the first current to the second current;
- and
- a decoupling inductor coupled in series between said semiconductor switch and said second bus;
- and
- a gate driver circuit system coupled to and configured to operate said semiconductor switch system of each switching circuit, said gate driver circuit system comprising a first gate driver circuit coupled to and configured to provide a first control signal to said first semiconductor switch of each switching circuit, said gate driver circuit further comprising a second gate driver circuit coupled to and configured to provide a second control signal to said second semiconductor switch of each switching circuit, wherein said first gate driver circuit and said second gate driver circuit are controlled independently to (i) synchronize control of said first semiconductor switch of each of the plurality of phase legs using the first control signal, (ii) synchronize control of said second semiconductor switch of each of the plurality of phase legs using the second control signal, and (iii) provide substantially equal current sharing among said semiconductor switch system of each of the plurality of phase legs switching circuits.
6 more elements
Dependencies are inferred from the claim text.