Ramp signal generator, image sensor including the same, and operating method thereof
AssigneeSamsung Electronics Co., Ltd.
InventorsMyeongjin Oh, Mooyoung Kim, Jaejung Park, Haneul Jung
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Abstract
A ramp signal generator includes a clock divider configured to generate a plurality of ramp clocks having different clocks, an output bit selector configured to select an output bit for reading out a pixel signal based on an analog gain of a ramp signal, a ramp clock controller configured to set a clock corresponding to the output bit, from among the plurality of ramp clocks, as a ramp clock, and a ramp offset controller configured to set an offset value corresponding to the output bit, from among a plurality of offset values, as a ramp offset value.
Claims20
A ramp signal generator comprising:
- a clock divider configured to generate a plurality of ramp clocks having different clocks;
- an output bit selector configured to select an output bit for reading out a pixel signal based on an analog gain of a ramp signal;
- a ramp clock controller configured to set a clock corresponding to the output bit, from among the plurality of ramp clocks, as a selected ramp clock;
- and
- a ramp offset controller configured to set an offset value corresponding to the output bit, from among a plurality of offset values, as a ramp offset value.
An image sensor comprising:
- a pixel array including a plurality of pixels;
- a ramp signal generator configured to generate ramp signals having different clocks according to a conversion gain mode;
- and
- a correlated double sampler configured to compare one of the ramp signals with an output signal of the pixel array and to output a comparison signal,
- the ramp signal generator further configured to output a first ramp signal in a high conversion gain (HCG) mode of the conversion gain mode and output a second ramp signal in a low conversion gain (LCG) mode of the conversion gain mode,
- the ramp signal generator including an inverter, a first AND gate, and a second AND gate, the first AND gate and the second AND gate configured to receive an output of the inverter, the first AND gate configured to receive an option signal which varies based on the HCG mode and the LCG mode.
An operating method of a ramp signal generator, the operating method comprising:
- generating a plurality of ramp clocks having different clocks;
- selecting an output bit for reading out a pixel based on an analog gain in a conversion gain mode;
- setting a clock corresponding to the output bit, from among the plurality of ramp clocks, as a selected ramp clock;
- setting an offset value corresponding to the output bit, from among a plurality of offset values, as a ramp offset;
- and
- outputting a ramp signal having the selected ramp clock and the offset value.
Dependencies are inferred from the claim text.