Methods and apparatus to control a slew rate of driver circuitry

An apparatus comprising:

• a first transistor having a first terminal and a control terminal;
• a second transistor having a first terminal, a second terminal, and a control terminal, the first terminal of the second transistor coupled to the first terminal of the first transistor and the control terminal of the first transistor;
• a first capacitor having a first terminal and a second terminal;
• a second capacitor having a first terminal and a second terminal;
• a third transistor having a first terminal, a second terminal, and a control terminal, the first terminal of the third transistor coupled to the second terminal of the second transistor, the first terminal of the first capacitor, and the first terminal of the second capacitor, and the control terminal of the third transistor;
• a fourth transistor having a first terminal and a control terminal, the first terminal of the fourth transistor coupled to the second terminal of the third transistor;
• a fifth transistor having a first terminal and a second terminal;
• and
• a sixth transistor having a first terminal and a second terminal, the first terminal of the sixth transistor coupled to the control terminal of the second transistor, the second terminal of the first capacitor, and the first terminal of the fifth transistor, the second terminal of the sixth transistor coupled to the second terminal of the second capacitor, the control terminal of the fourth transistor, and the second terminal of the fifth transistor.

An apparatus comprising:

• a first transistor having a first terminal and a control terminal;
• a second transistor having a first terminal and a control terminal;
• a first capacitor having a first terminal and a second terminal;
• a second capacitor having a first terminal and a second terminal, the first terminal of the second capacitor coupled to the first terminal of the first transistor, the first terminal of the second transistor, and the first terminal of the first capacitor;
• first current source circuitry having a terminal;
• second current source circuitry having a terminal;
• a third transistor having a first terminal and a second terminal;
• a fourth transistor having a first terminal and a second terminal, the first terminal of the fourth transistor coupled to the control terminal of the first transistor, the second terminal of the first capacitor, the terminal of the first current source circuitry, and the first terminal of the third transistor, the second terminal of the fourth transistor coupled to the control terminal of the second transistor, the second terminal of the second capacitor, the terminal of the second current source circuitry, and the second terminal of the third transistor;
• and
• wherein the first and second transistors are configured to produce a shoot-through current during switching of the first and second transistors.