Temperature and voltage insensitive crosstalk cancellation
AssigneeIntel Corporation
InventorTaner Sumesaglam
Life of this patent
Estimating the term…
Abstract
An improved circuit for crosstalk cancellation may be used to provide improved receiver crosstalk cancelation. These solutions may include a high-pass filter that is configured to be matched to victim path. These solutions may reduce or eliminate the use of a unity gain buffer and in-line high-pass filter, which may reduce design complexity and improve performance. These solutions provide crosstalk cancellation that requires less power, is less complex, is less sensitive to temperature and voltage, and is more effective at providing crosstalk cancellation. This improved crosstalk cancellation further provides channel eye height improvement, reduced EHI temperature sensitivity, reduced EHI voltage sensitivity, reduced design complexity, and reduced silicon circuit area.
Claims19
A system comprising:
- a first differential pair amplifier circuit including:
- a first transistor to:
- receive a first amplified signal at a first transistor source node;
- receive a crosstalk signal at a first transistor gate node;
- and
- generate a first cancellation pulse to cancel a first crosstalk pulse in the first amplified signal;
- and
- a second transistor to:
- receive a second amplified signal at a second transistor source node;
- receive a voltage reference signal at a second transistor gate node;
- and
- generate a second cancellation pulse to cancel a second crosstalk pulse in the second amplified signal.
A method comprising:
- receiving a first amplified signal at a first transistor source node of a first transistor;
- receiving a crosstalk signal at a first transistor gate node of the first transistor;
- generating a first cancellation pulse at the first transistor, the first cancellation pulse to cancel a first crosstalk pulse in the first amplified signal;
- receiving a second amplified signal at a second transistor source node of a second transistor;
- receiving a voltage reference signal at a second transistor gate node of the second transistor;
- and
- generating a second cancellation pulse at the second transistor, the second cancellation pulse to cancel a second crosstalk pulse in the second amplified signal.
A system comprising:
- an input differential equalizer circuit, the input differential equalizer circuit to generate the first amplified signal and the second amplified signal based on the crosstalk signal;
- a differential output circuit;
- and
- a crosstalk cancellation circuit to:
- receive a first amplified signal and a second amplified signal from the input differential equalizer circuit;
- receive a crosstalk signal from a crosstalk communication line;
- receive a voltage reference signal;
- and
- generate a differential cancellation signal based on the first amplified signal, the second amplified signal, the crosstalk signal, and the voltage reference signal.
Dependencies are inferred from the claim text.