US 12,700,853 B2Granted

Set-tolerant comparator

AssigneeTexas Instruments Incorporated

InventorAaron Chen

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Abstract

A comparator includes a differential input, an output, a pair of first transistors coupled to the differential input, a pair of second transistors coupled to the output, and a SET protection circuit. Gate terminals of the pair of first transistors are coupled to the differential input of the comparator. The second terminals of the pair of second transistors are coupled to the second terminals of the pair of first transistors. The SET protection circuit has a current source and a transistor. The transistor of the SET protection circuit has a first terminal coupled to the body terminals of the pair of first transistors to bias the body terminals of the pair of first transistors separate from the first terminals of the pair of first transistors. A gate terminal of the transistor of the SET protection circuit is coupled to a terminal of the differential input of the comparator.

Claims13

Dependent claims

A circuit, comprising:

a first input;
a second input;
an output;
a first transistor including a first terminal, a second terminal, a gate terminal and a body terminal, the gate terminal of the first transistor coupled to the first input of the circuit;
a second transistor including a first terminal, a second terminal, a gate terminal and a body terminal, the body terminal of the second transistor coupled to the body terminal of the first transistor, the first terminal of the first transistor coupled to the first terminal of the second transistor, and the gate terminal of the second transistor coupled to the second input of the circuit;
a third transistor including a first terminal, a second terminal, and a control terminal, the second terminal of the third transistor coupled to the second terminal of the first transistor;
a fourth transistor including a first terminal, a second terminal, and a control terminal, the second terminal of the fourth transistor coupled to the second terminal of the second transistor and coupled to the output of the circuit;
and
a fifth transistor including a first terminal, a second terminal, a gate terminal and a body terminal, the gate terminal of the fifth transistor coupled to the gate terminal of the first transistor, the first terminal of the fifth transistor coupled to the body terminal of the fifth transistor, coupled to the body terminal of the first transistor and coupled to the body terminal of the second transistor.

6 more elements

A circuit, comprising:

a differential input;
an output;
a first transistor including a first terminal, a second terminal, a gate terminal and a body terminal, the gate terminal of the first transistor coupled to the differential input of the circuit;
a second transistor including a first terminal, a second terminal, a gate terminal and a body terminal, the body terminal of the second transistor coupled to the body terminal of the first transistor, the first terminal of the first transistor coupled to the first terminal of the second transistor, and the gate terminal of the second transistor coupled to the differential input of the circuit;
a third transistor including a first terminal, a second terminal, and a gate terminal, the second terminal of the third transistor coupled to the second terminal of the first transistor;
a fourth transistor including a first terminal, a second terminal, and a gate terminal, the second terminal of the fourth transistor coupled to the second terminal of the second transistor and coupled to the output of the circuit;
and
a protection circuit having a transistor, the transistor of the protection circuit having a first terminal, a second terminal, a gate terminal and a body terminal, the first terminal of the transistor of the protection circuit coupled to the body terminal of the transistor of the protection circuit, coupled to the body terminal of the first transistor and coupled to the body terminal of the second transistor, the protection circuit configured to bias the body terminal of the first transistor and the body terminal of the second transistor independently from the first terminal of the first transistor and the first terminal of the second transistor.

5 more elements

Dependencies are inferred from the claim text.