Display device

A display device comprising:

• a plurality of data lines and a plurality of pixels,
• wherein each of the plurality of pixels includes:
• a light emitting element;
• a first transistor including a gate electrode connected to a first node, a first electrode connected to a second node electrically connected to a first power line, and a second electrode connected to a third node electrically connected to the light emitting element;
• a second transistor configured to receive a first scan signal, and connected to between a data line of the plurality of data lines and the first electrode of the first transistor;
• and
• a plurality of third transistors connected between the first node and the third node,
• wherein the plurality of data lines includes:
• a plurality of first group data lines;
• and
• a plurality of second group data lines,
• wherein the plurality of pixels includes:
• a plurality of first group pixels connected to the plurality of first group data lines;
• and
• a plurality of second group pixels connected to the plurality of second group data lines,
• wherein the first scan signal and a first clock signal are applied to different transistors of the plurality of third transistors in each of the plurality of first group pixels, and
• the first scan signal and a second clock signal different from the first clock signal are applied to different transistors of the plurality of third transistors in each of the plurality of second group pixels.

A display device comprising:

• a plurality of pixels including a plurality of first group pixels and a plurality of second group pixels,
• wherein each pixel of the plurality of pixels includes:
• a light emitting element;
• a first transistor connected between a first power line for applying a first power supply voltage, and the light emitting element, and including a gate electrode connected to a first node;
• a second transistor connected between the first transistor and a data line for applying a data signal and including a gate electrode to receive a first scan signal;
• and
• a plurality of third transistors connected between the first transistor and the first node,
• wherein the first scan signal and a first clock signal are applied to different transistors of the plurality of third transistors in each pixel of the plurality of first group pixels, and
• the first scan signal and a second clock signal different from the first clock signal are applied to different transistors of the plurality of third transistors in each pixel of the plurality of second group pixels.