Impedance adjustment circuit and semiconductor apparatus including the impedance adjustment circuit

A semiconductor apparatus, comprising:

• an impedance adjustment circuit configured to perform an impedance adjustment operation to generate a source impedance code in response to an activation of an impedance adjustment enable signal, configured to perform a first channel code update operation to update a first channel impedance code according to the source impedance code when a first channel code update request signal is input, configured to perform a second channel code update operation to update a second channel impedance code according to the first channel impedance code when a second channel code update request signal is input, and configured to block the second channel code update operation when the second channel code update request signal is input while performing the first channel code update operation;
• a first channel including a first memory region and a first transmitter circuit, the first channel providing the first channel code update request signal to the impedance adjustment circuit, and configured to adjust an impedance of the first transmitter circuit according to the first channel impedance code;
• and
• a second channel including a second memory region and a second transmitter circuit, the second channel providing the second channel code update request signal to the impedance adjustment circuit, and configured to adjust an impedance of the second transmitter circuit according to the second channel impedance code.