US 12,689,286 B2Granted

Gate driver control for high frequency switching converter

AssigneeMonolithic Power Systems, Inc.

InventorsWen-Jie Tsou, Bor-Tsang Hwang, Yu-Huei Lee, Haoyang You

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Abstract

A gate driver circuit includes a high side driver circuit, a low side driver circuit, and an on-time control circuit. The high side driver circuit provides a first gate driving signal to a high side power switch. The low side driver circuit provides a second gate driving signal to a low side power switch. The on-time control circuit is configured to provide the first on-time adjusting signal in response to the first on-time control signal and the second feedback signal. The on-time of the first on-time adjusting signal is greater than the on-time of the first on-time control signal. The on-time control circuit is further configured to provide the second on-time adjusting signal in response to the second on-time control signal and the second feedback signal. The on-time of the second on-time adjusting signal is greater than the on-time of the second on-time control signal.

Claims24

Dependent claims

A gate driver circuit for a switching converter, and the gate driver circuit comprises:

a high side driver circuit configured to provide a first gate driving signal to a high side power switch of the switching converter;
a low side driver circuit configured to provide a second gate driving signal to a low side power switch of the switching converter;
and
an on-time control circuit configured to receive a first on-time control signal and a second feedback signal indicating a status of the second gate driving signal, and provide the first on-time adjusting signal in response to the first on-time control signal and the second feedback signal, wherein the first gate driving signal is generated in response to the first on-time adjusting signal, and an on-time of the first on-time adjusting signal is greater than the on-time of the first on-time control signal;
wherein the on-time control circuit is further configured to receive a second on-time control signal and a first feedback signal indicating a status of the first gate driving signal, and provide the second on-time adjusting signal in response to the second on-time control signal and the second feedback signal, wherein the second gate driving signal is generated in response to the second on-time adjusting signal, and an on-time of the second on-time adjusting signal is greater than the on-time of the second on-time control signal.

2 more elements

A gate driver circuit for a switching converter, and the gate driver circuit comprises:

a high side driver circuit configured to provide a first gate driving signal to a high side power switch of the switching converter;
a low side driver circuit configured to provide a second gate driving signal to a low side power switch of the switching converter;
and
an on-time control circuit configured to receive a first on-time control signal and a first feedback signal indicating a status of the first gate driving signal, and provide the first on-time adjusting signal in response to the first on-time control signal and the first feedback signal, wherein the first gate driving signal is generated in response to the first on-time adjusting signal;
wherein the on-time control circuit is further configured to receive a second on-time control signal and a second feedback signal indicating a status of the second gate driving signal, and provide the second on-time adjusting signal in response to the second on-time control signal and the second feedback signal, wherein the second gate driving signal is generated in response to the second on-time adjusting signal.

2 more elements

A gate driver circuit for a switching converter, and the gate driver circuit comprises:

a high side driver circuit configured to provide a first gate driving signal to a high side power switch of the switching converter;
a low side driver circuit configured to provide a second gate driving signal to a low side power switch of the switching converter;
and
an on-time control circuit configured to receive a first on-time control signal and a second feedback signal indicating a status of the second gate driving signal, and provide the first on-time adjusting signal in response to the first on-time control signal and the second feedback signal, wherein the first gate driving signal is generated in response to the first on-time adjusting signal;
wherein the on-time control circuit is further configured to receive a second on-time control signal and a first feedback signal indicating a status of the first gate driving signal, and provide the second on-time adjusting signal in response to the second on-time control signal and the second on-time adjusting signal, wherein the second gate driving signal is generated in response to the second on-time adjusting signal;
wherein the first feedback signal is generated in response to the first on-time adjusting signal and a first delay;
and
wherein the second feedback signal is generated in response to the second on-time adjusting signal and a second delay.

5 more elements

Dependencies are inferred from the claim text.

Facts

Application: 18/981,159Filed 13 Dec 2024 · us provisional application
Priority: 15 Dec 2023
Published: US 2025/0202344 A119 Jun 2025
Granted: 21 Jul 2026
Term ends: Not estimatedThe source records don’t support an estimate.

Classification8 codes

H02M 1/088
Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters: for the…
H02M 3/157
With automatic control of output voltage or current, e.g. switching regulators: with digital control
H02M 3/158
With automatic control of output voltage or current, e.g. switching regulators: including plural semiconductor devices as final control devices…
H03K 17/6871
The devices being field-effect transistors: the output circuit comprising more than one controlled field-effect transistor