CMOS structure, and fabrication methods of FinFET CMOS, FD CMOS and GAA CMOS

A fabrication method of a CMOS structure comprising an nMOS and a pMOS, wherein the CMOS structure is a FinFET CMOS, and the fabrication method comprises:

• providing a semiconductor substrate;
• forming a first fin and a second fin with the same conductivity type on the semiconductor substrate, wherein the first fin comprises a first channel region, and the second fin comprises a second channel region;
• forming, on top and sidewall surfaces of the first fin and the second fin, a gate dielectric layer, and a first gate electrode and a second gate electrode with the same work function;
• fabricating a first source region and a first drain region in the first fin to form the nMOS;
• fabricating a second source region and a second drain region in the second fin to form the pMOS;
• wherein the first channel region and the second channel region are formed of semiconductor materials with the same conductivity type;
• wherein the first gate electrode and the second gate electrode are formed of conductive materials with the same work function;
• wherein the CMOS structure is a fin field-effect transistor (FinFET) CMOS;
• wherein the first channel region is formed in a first fin, the second channel region is formed in a second fin, and the first fin and the second fin are formed of the semiconductor materials with the same conductivity type and the same doping concentration;
• wherein the first gate electrode is located on the first fin, and the second gate electrode is located on the second fin;
• and
• wherein the semiconductor substrate is bulk silicon including a Si substrate layer and a Si epitaxial layer located on the Si substrate layer, the Si substrate layer is one of a p-type material or an n-type material, the Si epitaxial layer is the other of the p-type material or the n-type material, and the first fin and the second fin are formed by the Si epitaxial layer of the bulk silicon.