Zero-crossing detection circuit

A semiconductor integrated circuit device comprising:

• a zero-crossing detection unit configured to compare a first monitoring target signal and a second monitoring target signal respectively input through diodes from a first node and a second node between which an AC signal is applied, so as to generate a comparison signal, the comparison signal being a pulse signal with a predetermined period;
• a logic unit configured to
• count a pulse interval of the comparison signal to provide a count value, and estimate a zero cross of the AC signal using the count value, so as to generate a zero-crossing detection signal;
• and
• a monitoring unit configured to adjust the first monitoring target signal and the second monitoring target signal to be suitable for input to the zero-crossing detection unit,
• wherein
• a first chip, in which the monitoring unit is integrated, is cut out in a rectangular shape having a substantially equal ratio between a short side and a long side in a plan view.