Transimpedance amplifier circuits and devices
AssigneesSTMicroelectronics (Alps) SAS, STMicroelectronics (Grenoble) SAS
InventorsVratislav Michal, Nicolas Moeneclaey, Jean-Luc Patry
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Abstract
The present disclosure relates to a device comprising a first transimpedance amplifier comprising a first amplification stage with a first MOS transistor, a second transimpedance amplifier comprising a second amplification stage with a second MOS transistor, and a current source series-connected with the first and second amplification stages, the current source having a first terminal coupled to the drain of the first MOS transistor and a second terminal coupled to the drain of the second MOS transistor.
Claims20
A device comprising:
- a first transimpedance amplifier comprising:
- a first amplification stage with a first metal-oxide-semiconductor (MOS) transistor, the first MOS transistor having a source connected to a first node configured to receive a first supply potential, a drain coupled to an output of the first transimpedance amplifier, and a gate connected to an input of the first transimpedance amplifier;
- and
- a first feedback impedance having a first terminal connected to the input of the first transimpedance amplifier and a second terminal connected to the output of the first transimpedance amplifier;
- a second transimpedance amplifier comprising:
- a second amplification stage with a second MOS transistor, the second MOS transistor having a source connected to a second node configured to receive a second supply potential, a drain coupled to an output of the second transimpedance amplifier, and a gate connected to an input of the second transimpedance amplifier;
- and
- a second feedback impedance having a first terminal connected to the input of the second transimpedance amplifier and a second terminal connected to the output of the second transimpedance amplifier;
- and
- a current source series-connected with the first and second amplification stages between the first and second nodes, the current source having a first terminal coupled to the drain of the first MOS transistor and a second terminal coupled to the drain of the second MOS transistor;
- wherein neither the first MOS transistor nor the second MOS transistor is part of a differential pair in the first or second transimpedance amplifier, respectively.
A device comprising:
- a first transimpedance amplifier comprising:
- a first amplification stage with a first metal-oxide-semiconductor (MOS) transistor, the first MOS transistor having a source connected to a first node configured to receive a first supply potential, a drain coupled to an output of the first transimpedance amplifier, and a gate connected to an input of the first transimpedance amplifier;
- and
- a first feedback impedance having a first terminal connected to the input of the first transimpedance amplifier and a second terminal connected to the output of the first transimpedance amplifier;
- a second transimpedance amplifier comprising:
- a second amplification stage with a second MOS transistor, the second MOS transistor having a source connected to a second node configured to receive a second supply potential, a drain coupled to an output of the second transimpedance amplifier, and a gate connected to an input of the second transimpedance amplifier;
- and
- a second feedback impedance having a first terminal connected to the input of the second transimpedance amplifier and a second terminal connected to the output of the second transimpedance amplifier;
- a first sensing element having a first terminal connected to the input of the first transimpedance amplifier;
- a second sensing element having a second terminal connected to the input of the second transimpedance amplifier;
- and
- a current source series-connected with the first and second amplification stages between the first and second nodes, the current source having a first terminal coupled to the drain of the first MOS transistor and a second terminal coupled to the drain of the second MOS transistor, and the current source configured to deliver a bias current to the first MOS transistor and the second MOS transistor;
- wherein neither the first MOS transistor nor the second MOS transistor is part of a differential pair in the first or second transimpedance amplifier, respectively.
A device comprising:
- a first transimpedance amplifier comprising:
- a first amplification stage with a first metal-oxide-semiconductor (MOS) transistor, the first MOS transistor having a source connected to a first node configured to receive a first supply potential, a drain coupled to an output of the first transimpedance amplifier, and a gate connected to an input of the first transimpedance amplifier, wherein the first amplification stage is coupled to the output of the first transimpedance amplifier by a first gain stage;
- and
- a first feedback impedance having a first terminal connected to the input of the first transimpedance amplifier and a second terminal connected to the output of the first transimpedance amplifier;
- a second transimpedance amplifier comprising:
- a second amplification stage with a second MOS transistor, the second MOS transistor having a source connected to a second node configured to receive a second supply potential, a drain coupled to an output of the second transimpedance amplifier, and a gate connected to an input of the second transimpedance amplifier, wherein the second amplification stage is coupled to the output of the second transimpedance amplifier by a second gain stage;
- and
- a second feedback impedance having a first terminal connected to the input of the second transimpedance amplifier and a second terminal connected to the output of the second transimpedance amplifier;
- and
- a current source series-connected with the first and second amplification stages between the first and second nodes, the current source having a first terminal coupled to the drain of the first MOS transistor and a second terminal coupled to the drain of the second MOS transistor, and the current source configured to deliver a bias current to the first MOS transistor and the second MOS transistor;
- wherein neither the first MOS transistor nor the second MOS transistor is part of a differential pair in the first or second transimpedance amplifier, respectively.
Dependencies are inferred from the claim text.