Lithography scanner throughput
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsKai-Chieh Chang, Che-Chang Hsu, Kai-Fa Ho, Li-Jui Chen
Life of this patent
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Abstract
A method and system for optimizing scan speed of a lithography scanner. A process design layout corresponding to a plurality of rows of fields to be formed on an associated wafer is received and a default machine constant of the lithography scanner is determined. Each of the plurality of rows is then identified corresponding to the received process design layout. A scan speed for each determined type of row and the determined default machine constant is then determined. The associated wafer is then processed utilizing the determined scan speed for each of the plurality of rows in accordance with the process design layout.
Claims20
A method for optimizing scan speed for increased throughput in a lithography device, the lithography device including a reticle assembly stage and a wafer assembly stage, the method comprising:
- receiving a process design layout corresponding to a plurality of fields to be formed on an associated wafer;
- determining a full field scan length in accordance with the received process design layout;
- determining a default machine constant including determining a movement speed of the reticle assembly stage and determining a movement speed of the wafer assembly stage;
- identifying a type of each of a plurality of rows of fields corresponding to the received process design layout, wherein the type of row of field is selected from a group including a center fields row, an edge fields row, or an edge and center field combined row;
- determining a center field row scan speed for each of the plurality of rows identified as a center fields row;
- determining an edge field row scan speed for each of the plurality of rows identified as an edge fields row;
- determining an edge and center field combined row scan speed for each of the plurality of rows identified as an edge and center field combined row, wherein the edge and center field combined row scan speed utilizes the center field row scan speed for each center field in the edge and center field combined row and the edge field scan speed for each edge field in the edge and center field combined row;
- and
- processing the associated wafer utilizing the center field row scan speed, the edge field scan speed, and the edge and center field combined scan speed in accordance with the process design layout;
- wherein each center field is the full scan length and each edge field has a scan length less than the full scan length;
- wherein determining the center field row scan speed, the edge field scan speed, and the edge and center field combined scan speed is performed in accordance with the default machine constant;
- and
- wherein determining the center field row scan speed further comprises differentiating a scan time of the lithography device and an acceleration time of the reticle stage assembly.
A method for optimizing scan speed of a lithography scanner device, the lithography scanner device including a reticle assembly stage and a wafer assembly stage, the method comprising:
- receiving a process design layout corresponding to a plurality of rows of fields to be formed on an associated wafer;
- determining a default machine constant of the lithography scanner;
- identifying a type of each of the plurality of rows of fields corresponding to the received process design layout, wherein the type of row of field is selected from a group including a center fields row, an edge fields row, or an edge and center field combined row;
- determining a scan speed in accordance with the determined type of row and the determined default machine constant;
- and
- processing the associated wafer utilizing the determined scan speed for each of the plurality of rows in accordance with the process design layout;
- wherein determining a center field row scan speed further comprises differentiating a scan time of the lithography scanner device and an acceleration time of the reticle stage assembly.
A system for optimizing scan speed of a lithographic scanner device, the system comprising:
- a reticle stage assembly, comprising a reticle and at least one motor for movement in the x-direction and the y-direction;
- a wafer stage assembly, comprising a wafer stage body and a wafer retention component configured to hold a wafer thereon;
- and
- a controller comprising a processor in communication with memory storing instructions which are executed by the processor to:
- receive a process design layout corresponding to a plurality of fields to be formed on the wafer,
- identify, via a field identification component, each of the plurality of fields as a center field or an edge field,
- determine, via a scan speed determination component;
- a center field row scan speed for each of a plurality of rows identified as a center fields row;
- an edge field row scan speed for each of a plurality of rows identified as an edge fields row;
- an edge and center field combined row scan speed for each of a plurality of rows identified as an edge and center field combined row, wherein the edge and center field combined row scan speed utilizes the center field row scan speed for each center field in the edge and center field combined row and the edge field scan speed for each edge field in the edge and center field combined row;
- and
- an optimum scan speed for each field in the plurality of fields in accordance with the identified field type and a default machine constant, wherein determining an optimum scan speed for the center field comprises differentiating a scan time of the lithographic scanner device and an acceleration time of the reticle stage assembly, and
- activate, via a motor control component, the at least one motor in accordance with the determined optimum scan speed for each of the plurality of fields.
Dependencies are inferred from the claim text.