Diagnostic ring oscillator circuit for DC and transient characterization

An electronic device, comprising:

• a ring oscillator (RO) circuit comprising a plurality of stages coupled via an RO feedback signal line and forming an inverter chain, the plurality of stages including,
• for each stage, a respective Complementary Metal-Oxide Semiconductor (CMOS) inverter comprising a pair of p-channel Metal-Oxide-Semiconductor (pMOS) and N-channel Metal-Oxide-Semiconductor (nMOS) transistors followed by a pass gate, wherein an output of a pass gate for a first stage is coupled to an input for the respective CMOS inverter of a next stage;
• an enable stage to enable the inverter chain to be put into a free oscillating mode or first mode in which the RO circuit does not freely oscillate;
• a Device Under Test (DUT) stage preceded by a pre-stage where respective supply rails of the DUT stage and the pre-stage are coupled to respective CMOS inverters of the DUT stage and the pre-stage and isolated from one another via at least one transistor.

An apparatus, comprising:

• electronic measurement equipment coupled to a ring oscillator (RO) circuit for capturing one or more characteristics relating to aging of CMOS circuitry in a CMOS device, the RO circuit, comprising:
• a plurality of stages coupled via an RO feedback signal line and forming an inverter chain, the plurality of stages including:
• for each stage, a respective Complementary Metal-Oxide Semiconductor (CMOS) inverter comprising a pair of p-channel Metal-Oxide-Semiconductor (pMOS) and N-channel Metal-Oxide-Semiconductor (nMOS) transistors followed by a pass gate, wherein an output of a pass gate for a first stage is coupled to an input for the respective CMOS inverter of a next stage;
• an enable stage to enable the inverter chain to be put into a free oscillating mode or a first mode in which the RO circuit does not freely oscillate;
• and
• a Device Under Test (DUT) stage preceded by a pre-stage where respective supply rails of the DUT stage and the pre-stage are coupled to respective CMOS inverters of the DUT stage and the pre-stage and isolated from one another via at least one transistor.