Overlap circuit for a power system

An overlap circuit for a power system, the overlap circuit comprising:

• a first controllable switch configured to be directly coupled between a first power source and a load/source, the first controllable switch comprising at least one first variable resistor;
• and
• a second controllable switch configured to be directly coupled between a second power source and the load/source, the second controllable switch comprising at least one second variable resistor;
• wherein the overlap circuit is configured to switch between a first mode and a second mode;
• wherein, in the first mode:
• in a switching configuration i) during a first time period T1, the first controllable switch is configured to feed a first current i1 from the first power source to the load/source when the second controllable switch is configured to block a second current i2 from the second power source to the load/source,
• in a switching configuration ii) during a second time period T2 following the first time period T1, the first controllable switch is configured to feed the first current i1 from the first power source to the load/source while the at least one first variable resistor transitions from fully conductive to fully non-conductive when the second controllable switch is configured to feed the second current i2 from the load to the second power source while the at least one second variable resistor transitions from fully non-conductive to fully conductive, and
• in a switching configuration iii) during a third time period T3 following the second time period T2, the first controllable switch is configured to block the first current i1 from the first power source to the load/source when the second controllable switch is configured to feed the second current i2 from the second power source to the load/source;
• wherein, in the second mode:
• in a switching configuration iv) during a fourth time period T4, the first controllable switch is configured to feed a third current is from the load/source to the first power source when the second controllable switch is configured to block a fourth current i4 from the load/source to the second power source;
• in a switching configuration v) during a fifth time period T5 following the fourth time period T4, the first controllable switch is configured to feed the third current i3 from the load/source to the first power source while the at least one first variable resistor transitions from fully conductive to fully non-conductive when the second controllable switch is configured to feed the fourth current i4 from the load/source to the second power source while the at least one second variable resistor transitions from fully non-conductive to fully conductive;
• and
• in a switching configuration vi) during a sixth time period T6 following the fifth time period T5, the first controllable switch is configured to block the third current is from the load/source to the first power source when the second controllable switch is configured to feed the fourth current i4 from the load/source to the second power source.