Leveling system for cantilever calibration
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChao-Hung Chu, Ching-Hui Lin, Fu-Chun Huang, Po-Chen Yeh, Yi-Hsien Chang, Chun-Ren Cheng, Shih-Fen Huang
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Abstract
In a micro-electromechanical system (MEMS) structure, leveling of a cantilever is performed using a dual-capacitor leveling system. One capacitor is used to determine the amount or degree of deformation. The other capacitor is used in conjunction with a diode to determine the direction of the deformation. This information can be used to calibrate the position of the cantilever for consistent positioning during operation. Methods for forming the dual-capacitor leveling system are also disclosed.
Claims20
A method for making a dual-capacitor leveling system for a cantilever, comprising:
- forming a bottom electrode layer, a piezoelectric layer upon the bottom electrode layer, and a top electrode layer upon the piezoelectric layer;
- forming a first capacitor that comprises the bottom electrode layer, a first insulator film upon the bottom electrode layer, and a primary metal layer upon the first insulator film that is electrically connected to the top electrode layer;
- forming a diode that is electrically connected to the bottom electrode layer;
- and
- forming a second capacitor upon the diode, the second capacitor comprising a secondary metal layer electrically connected to the diode, a second insulator film over the secondary metal layer, and a tertiary metal layer upon the second insulator film that is electrically connected to the top electrode layer.
A dual-capacitor leveling system for a cantilever, comprising:
- a piezoelectric region comprising a bottom electrode layer, a piezoelectric layer upon the bottom electrode layer, and a top electrode layer upon the piezoelectric layer;
- a first capacitor comprising the bottom electrode layer, a first insulator film upon the bottom electrode layer, and a primary metal layer upon the first insulator film that is electrically connected to the top electrode layer;
- a diode that is electrically connected to the bottom electrode layer;
- and
- a second capacitor upon the diode that comprises a secondary metal layer electrically connected to the diode, a second insulator film over the secondary metal layer, and a tertiary metal layer upon the second insulator film that is electrically connected to the top electrode layer.
A method for making a dual-capacitor leveling system, comprising:
- forming a first dielectric layer upon a substrate;
- forming an adhesion layer upon the first dielectric layer;
- forming a bottom electrode layer upon the adhesion layer;
- forming a piezoelectric layer upon the bottom electrode layer;
- forming a top electrode layer upon the piezoelectric layer;
- patterning the top electrode layer and the piezoelectric layer to expose the bottom electrode layer;
- applying a first intermetal dielectric (IMD) sublayer upon the substrate;
- patterning the first IMD sublayer to expose the bottom electrode layer in a first capacitor region of the substrate;
- forming a first insulator film in the first capacitor region, the first insulator film including a first end, a central region, and a second end;
- applying a second IMD sublayer upon the substrate to cover the first insulator film in the first capacitor region and form an IMD layer;
- patterning the IMD layer to expose the bottom electrode layer in a second capacitor region of the substrate;
- forming a diode in the second capacitor region, the diode including a first end, a central region, and a second end;
- applying a third IMD sublayer upon the substrate that covers the diode in the second capacitor region and adds to the IMD layer;
- patterning the third IMD sublayer to expose the diode;
- forming a secondary metal layer over the diode;
- forming a second insulator film over the secondary metal layer;
- applying a fourth IMD sublayer upon the substrate that covers the second insulator film in the second capacitor region and adds to the IMD layer;
- patterning the IMD layer to expose the top electrode layer;
- patterning the IMD layer to expose the first end and the second end of the first insulator film in the first capacitor region, with a portion of the IMD layer remaining above the central region of the first insulator film;
- patterning the IMD layer to expose the first end and the second end of the second insulator film in the second capacitor region, with a portion of the IMD layer remaining above the central region of the second insulator film;
- depositing a second metal layer upon the substrate, the second metal layer covering the first end and the second end of the first insulator film and the first end and the second end of the second insulator film, wherein a first capacitor is formed in the first capacitor region and a second capacitor is formed in the second capacitor region;
- and
- removing the substrate below the piezoelectric layer to form a backside cavity.
Dependencies are inferred from the claim text.