Positive hysteresis elimination comparison circuit and motor driver having positive hysteresis elimination comparison circuit

A motor driver having a positive hysteresis elimination comparison circuit, suitable for a three-phase motor, wherein a first terminal of a first coil of the first phase of the three-phase motor, a first terminal of a second coil of a second phase of the three-phase motor, and a first terminal of a third coil of the third phase of the three-phase motor are connected to a common contact point, and the motor driver includes:

• a positive hysteresis elimination comparison circuit, including:
• a comparator, wherein a first input terminal of the comparator receives a signal from one of a second terminal of the first coil, a second terminal of the second coil and a second terminal of the third coil of the three-phase motor as a first voltage signal, the second input terminal of the comparator receives a signal from the common contact point as a second voltage signal, and the comparator compares a voltage of a first voltage signal with a voltage of a second voltage signal within a comparison time to output a comparison signal;
• and
• a hysteresis switching circuit connected to a first control terminal of the comparator and configured to output a positive hysteresis elimination signal to the first control terminal of the comparator;
• a signal generation circuit connected to an output terminal of the comparator and configured to output a waveform signal according to the comparison signal received from the output terminal of the comparator;
• and
• a driver circuit connected to the signal generation circuit and the second terminal of the first coil, the second terminal of the second coil and the second terminal of the third coil of the three-phase motor, and configured to drive the three-phase motor according to the waveform signal received from the signal generation circuit;
• wherein, when a voltage of the first voltage signal is lower than a voltage of the second voltage signal, the comparison time is delayed by a negative hysteresis time;
• wherein, when the voltage of the first voltage signal is higher than the voltage of the second voltage signal and the first control terminal of the comparator receives the positive hysteresis elimination signal from the hysteresis switching circuit, the comparison time is not delayed by a positive hysteresis time.