Chip packaging apparatus and preparation method thereof

A chip packaging apparatus, comprising:

• a chip,
• a substrate, wherein a surface that is of the chip and that faces the substrate is electrically connected to the substrate by a plurality of bumps disposed between the chip and the substrate;
• and
• a plurality of warpage modulation strips comprising flexible material having a similar height and width arranged in a parallel pattern, formed of one of a polyimide or a phenolic aldehyde that is disposed on a surface that is of the chip and that is opposite to the substrate and bumps that connect the chip to the substrate, wherein a coefficient of thermal expansion of the plurality of warpage modulation strips is greater than a coefficient of thermal expansion of the chip and wherein each of the plurality of warpage modulation strips are sized to be smaller than the chip.