Back to results
US 12,604,740 B2Granted
Chip package with integrated embedded off-die inductors
AssigneeXilinx, Inc.
InventorsHong Shi, Li-Sheng Weng, Frank Peter Lambrecht, Jing Jing, Shuxian Wu
Life of this patent
Estimating the term…
Abstract
A chip package and method for fabricating the same are provided that includes embedded off-die inductors coupled in series. One of the off-die inductors is disposed in a redistribution layer formed on a bottom surface of an integrated circuit (IC) die. The other of the series connected off-die inductors is disposed in a substrate of the chip package. The substrate may be either an interposer or a package substrate.
Claims19
A chip package comprising:
- an integrated circuit (IC) die having functional circuitry;
- a substrate having a top side and a bottom side;
- a redistribution layer (RDL) disposed between the IC die and the top side of the substrate, the RDL comprising at least a first conductive layer and a second conductive layer that are patterned to form RDL circuitry within the RDL, the RDL circuitry connecting the IC die to the substrate;
- a first coil inductor formed from portions of the first conductive layer and the second conductive layer of the RDL;
- and
- a second coil inductor disposed in the substrate and coupled in series to the first coil inductor.
3 more elements
A chip package comprising:
- an integrated circuit (IC) die having functional circuitry;
- a package substrate having a top side and a bottom side;
- a redistribution layer (RDL) disposed between the IC die and the top side of the package substrate, the RDL comprising at least a first conductive layer and a second conductive layer that are patterned to form RDL circuitry within the RDL, the RDL circuitry connecting the IC die to the package substrate;
- a first inductor formed from portions of the first conductive layer and the second conductive layer of the RDL;
- a second inductor formed in a core of the package substrate and coupled in series to the first inductor, the second inductor being an air core inductor;
- a third inductor formed from portions of the first conductive layer and the second conductive layer of the RDL;
- and
- a fourth inductor formed in the core of the package substrate and coupled in series to the third inductor, the fourth inductor being an air core inductor, the fourth inductor disposed adjacent the second inductor, the fourth and second inductors having coils wound in opposite directions.
5 more elements
A method for fabricating a chip package, the method comprising:
- forming a first coil inductor within a redistribution layer (RDL) formed on an integrated circuit (IC) die;
- and
- connecting the first coil inductor in series with a second coil inductor formed in or within a substrate to form the chip package.
Dependencies are inferred from the claim text.