Semiconductor chip and semiconductor package including the same
AssigneeSamsung Electronics Co., Ltd.
InventorsYongho Kim, Jeonghoon Ahn
Life of this patent
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Abstract
A semiconductor chip and a semiconductor package, the semiconductor chip includes a semiconductor substrate; a through electrode penetrating the semiconductor substrate; a bonding pad including a first conductive pad connected to the through electrode, and a second conductive pad on a central portion of the first conductive pad, an outer portion of the first conductive pad protruding outwardly relative to a sidewall of the second conductive pad; and a pad insulating layer on the semiconductor substrate and surrounding a sidewall of the first conductive pad and the sidewall of the second conductive pad.
Claims18
A semiconductor chip, comprising:
- a semiconductor substrate;
- a through electrode penetrating the semiconductor substrate;
- a bonding pad including:
- a first conductive pad connected to the through electrode, and
- a second conductive pad on a central portion of the first conductive pad, an outer portion of the first conductive pad protruding outwardly relative to a sidewall of the second conductive pad;
- and
- a pad insulating layer on the semiconductor substrate and surrounding a sidewall of the first conductive pad and the sidewall of the second conductive pad,
- wherein the first conductive pad includes:
- a first core metal layer;
- and
- a first seed metal layer between a sidewall of the first core metal layer and the pad insulating layer and between a bottom surface of the first core metal layer and the through electrode.
A semiconductor package, comprising:
- a first semiconductor substrate including a first surface and a second surface, which are opposite to each other;
- a first through electrode penetrating the first semiconductor substrate;
- a first bonding pad including:
- a first conductive pad on the first surface of the first semiconductor substrate and connected to the first through electrode, and
- a second conductive pad on a central portion of the first conductive pad, an outer portion of the first conductive pad protruding outwardly relative to a sidewall of the second conductive pad;
- a first pad insulating layer on the first surface of the first semiconductor substrate and surrounding a sidewall of the first conductive pad and the sidewall of the second conductive pad;
- a second semiconductor substrate on the first pad insulating layer;
- a second through electrode penetrating the second semiconductor substrate;
- a second bonding pad bonded to the first bonding pad and electrically connecting the second through electrode to the first bonding pad;
- and
- a second pad insulating layer between the second semiconductor substrate and the first pad insulating layer and surrounding a sidewall of the second bonding pad,
- wherein the second bonding pad includes:
- a third conductive pad connected to the second through electrode;
- and
- a fourth conductive pad between the third conductive pad and the second conductive pad and bonded to the second conductive pad,
- wherein a central portion of the third conductive pad vertically overlaps the fourth conductive pad, and
- wherein an outer portion of the third conductive pad protrudes outwardly relative to a sidewall of the fourth conductive pad.
A semiconductor package comprising a first semiconductor chip and a second semiconductor chip, which are bonded to each other, wherein:
- the first semiconductor chip includes:
- a first semiconductor substrate including a first surface and a second surface, which are opposite to each other;
- a first through electrode penetrating the first semiconductor substrate;
- a first bonding pad including a first conductive pad on the first surface of the first semiconductor substrate and connected to the first through electrode, and a second conductive pad on a central portion of the first conductive pad, an outer portion of the first conductive pad protruding outwardly relative to a sidewall of the second conductive pad;
- and
- a first pad insulating layer on the first surface of the first semiconductor substrate and surrounding a sidewall of the first conductive pad and the sidewall of the second conductive pad,
- the second semiconductor chip includes:
- a second semiconductor substrate;
- a second through electrode penetrating the second semiconductor substrate;
- a second bonding pad bonded to the first bonding pad and including a third conductive pad connected to the second through electrode, and a fourth conductive pad between the third conductive pad and the second conductive pad, an outer portion of the third conductive pad protruding outwardly relative to a sidewall of the fourth conductive pad;
- and
- a second pad insulating layer between the second semiconductor substrate and the first pad insulating layer and surrounding a sidewall of the second bonding pad,
- the outer portion of the first conductive pad has a ring shape continuously extending around the sidewall of the second conductive pad in a plan view,
- the outer portion of the third conductive pad has a ring shape continuously extending around the sidewall of the fourth conductive pad in a plan view,
- a portion of the first pad insulating layer is between a bonding interface between the first semiconductor chip and the second semiconductor chip, and the outer portion of the first conductive pad,
- a portion of the second pad insulating layer is between the bonding interface and the outer portion of the third conductive pad, and
- each of the first conductive pad, the second conductive pad, the third conductive pad, and the fourth conductive pad has a rectangular shape in a cross-sectional view.
Dependencies are inferred from the claim text.