Semiconductor device and methods of manufacturing
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorFu-Ting Sung
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AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorFu-Ting Sung
Estimating the term…
A cell structure of a memory device includes an upper electrode structure separated from a metal line above the cell structure by a combination of one or more layers including an isolation layer. The cell structure may be patterned using a metal line below the cell structure as an etch-stop layer. Relative to other techniques that include patterning the cell structure using a silicon carbide layer located over the metal line below the cell structure as an etch-stop layer, the techniques described herein may reduce an overall height of the memory structure. Additionally, or alternatively, the techniques may maintain or increase an isolation distance between the metal line above the cell structure and the upper electrode structure. In this way, a likelihood of shorting between the metal line above the cell structure and the upper electrode structure is reduced to improve a performance and/or a reliability of the memory device.
A memory device, comprising:
A device, comprising:
A method, comprising:
A method, comprising:
Dependencies are inferred from the claim text.