Image sensors including pixel isolation structure including double trench

An image sensor comprising:

• a semiconductor substrate comprising a first surface and a second surface opposite the first surface and comprising a plurality of photoelectric conversion regions;
• a micro lens on the second surface of the semiconductor substrate;
• and
• a pixel isolation structure separating the plurality of photoelectric conversion regions from each other,
• wherein the pixel isolation structure comprises:
• a first trench recessed from the second surface of the semiconductor substrate into the semiconductor substrate;
• a second trench recessed from the second surface into the semiconductor substrate;
• and
• an isolation region that is between the first trench and the second trench and is configured to receive a bias via a contact structure that is in contact with the pixel isolation structure,
• wherein the first trench and the second trench are disposed between a first photoelectric conversion region of the plurality of photoelectric conversion regions and a second photoelectric conversion region of the plurality of photoelectric conversion regions that is adjacent to the first photoelectric conversion region.

An image sensor comprising:

• a pixel array comprising a plurality of pixels on a semiconductor substrate;
• a bias generator configured to supply a bias to the pixel array;
• and
• a plurality of conductive pads configured to apply the bias received from the bias generator to the pixel array,
• wherein the pixel array comprises:
• a first pixel isolation structure comprising a first trench recessed from a first surface of the semiconductor substrate into the semiconductor substrate to a first contact surface and a conductive layer in the first trench;
• and
• a second pixel isolation structure comprising a second trench and a third trench recessed from a second surface of the semiconductor substrate into the semiconductor substrate to a second contact surface and a third contact surface, respectively, a dielectric layer in the second trench and the third trench, and an isolation region between the second trench and the third trench,
• wherein the second surface of the semiconductor substrate is opposite the first surface of the semiconductor substrate,
• wherein the first contact surface of the first pixel isolation structure contacts the second contact surface and the third contact surface of the second pixel isolation structure and wherein the first pixel isolation structure and the second pixel isolation structure separate the plurality of pixels from each other, and
• the bias generator is configured to apply a first negative bias to the isolation region via a first pad of the plurality of conductive pads.