SiC trench MOSFET with an embedded junction barrier Schottky diode

A silicon carbide (SiC) power device comprising a plurality of unit cells with each unit cell in an active area comprising:

• an epitaxial layer of a first conductivity type on a substrate;
• a gate trench formed in said active area surrounded by a source region of said first conductivity type encompassed in a body region of a second conductivity type at a top portion of said epitaxial layer;
• a source-body-Schottky contact (SBSC) trench penetrating through said source region and said body region and extending into said epitaxial layer;
• a P-shield (PS) region of said second conductivity type for gate oxide electric-field reduction surrounding a bottom of said SBSC trench and being spaced apart from said gate trench;
• a body contact region of said second conductivity type disposed in said body region;
• a body combination area comprising said body region and body contact region;
• a sidewall P (SP) region of said second conductivity type formed selectively along a portion of sidewalls of said SBSC trench, connecting said PS region to said body contact region;
• a source metal filling into said SBSC trench to contact with said source region, said body contact region and said PS region;
• and form a Schottky barrier diode (SBD) region by making a Schottky contact with said epitaxial layer between said body contact region and said buried PS region;
• a junction barrier Schottky diode (JBSD) region formed between said source region and a bottom of said PS region, comprising a first PN (P-type/N-type) junction diode, a second PN junction diode and said SBD, wherein said first PN junction diode formed between a body combination area and said epitaxial layer, and a second PN junction diode formed between said buried PS region and said epitaxial layer.