Three-dimensional memory device containing dummy stack edge seal structure and methods for forming the same
AssigneeSanDisk Technologies LLC
InventorsYao Chen, Shigehisa Inoue, Kazuto Ohsawa, Hisaya Sakai
Life of this patent
Estimating the term…
Loading patent…
AssigneeSanDisk Technologies LLC
InventorsYao Chen, Shigehisa Inoue, Kazuto Ohsawa, Hisaya Sakai
Estimating the term…
A memory die includes first and second memory-region alternating stacks of memory-region insulating layers and electrically conductive layers that are laterally spaced apart from each other by a respective first portion of a retro-stepped dielectric structure overlying first stepped surfaces of the first and second memory-region alternating stacks, memory opening fill structures located the first and second memory-region alternating stacks, and a peripheral alternating stack of peripheral insulating layers and spacer material which is laterally spaced from the second memory-region alternating stack by a second portion of the retro-stepped dielectric structure overlying second stepped surfaces of the second memory-region alternating stack. Bottom surfaces of the first and second memory-region alternating stacks are spaced apart by a first lateral spacing distance, and bottom surfaces of the second memory alternating stack and the peripheral alternating stack are spaced apart by the first lateral spacing distance.
A semiconductor structure comprising a memory die, wherein the memory die comprises:
Dependencies are inferred from the claim text.