Semiconductor with extended life time flash memory

A semiconductor comprising:

• several storing cells;
• each of the several storing cells comprising:
• a stack structure with at least one control gate layer, at least two dielectric layers, at least one erasing layer, the erasing layer is insulated from the control gate layer by the dielectric layer;
• a receiving space crossed through the stack structure, wherein the receiving space comprises a first receiving portion, and several second receiving portions communicated with the first receiving portion;
• the first receiving portion is crossed through the stack structure;
• the second receiving portions are coplanar with the control gate layer;
• a blocking layer received in the second receiving portion;
• several floating gate layers received in the second receiving portion, and insulated from the control gate layers by the blocking layer;
• and
• a channel layer received in the second receiving portion,
• wherein an electron passing path is formed by the erasing layer cooperating with the floating gate layer in response that the semiconductor executes a data erasing process;
• and
• wherein the erasing layer comprises a specified pattern, from a top view, comprising two rectangular first portions parallel to each other and extend along a second horizontal direction and at least two rectangular second portions parallel to each other and extend along a third direction, the third direction is perpendicular to the second horizontal direction, at least one end of the rectangular second portion is in contact with the rectangular first portion, and the rectangular first portion comprises an electrical connection between the erasing layer and an external circuit.