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US 12,604,456 B2Granted
Semiconductor device and method for fabricating the same
AssigneeSK hynix Inc.
InventorsWan Sup Shin, Seung Wook Ryu, Seung Mi Yeo
Life of this patent
Estimating the term…
Abstract
A semiconductor device includes: a substrate; a body recess in the substrate; a body dielectric layer over the body recess; an active layer extending in a direction parallel to the substrate over the substrate; a contact node over an end portion of the active layer and perpendicular to the substrate; and a conductive line coupled to the contact node and extended perpendicular to the substrate.
Claims19
A semiconductor device, comprising:
- a substrate;
- a body recess in the substrate;
- a body dielectric layer over the body recess;
- an active layer extending in a direction parallel to the substrate over the substrate;
- a contact node over an end portion of the active layer and perpendicular to the substrate;
- and
- a conductive line coupled to the contact node and extended perpendicular to the substrate,
- wherein the conductive line has a buried portion in the substrate,
- wherein a sidewall and a bottom surface of the buried portion are surrounded by the body dielectric layer.
6 more elements
A semiconductor device, comprising:
- a body recess in a substrate;
- a body dielectric layer over the body recess;
- a transistor extending in a direction parallel to the substrate over the substrate and including an active layer having a first end portion and a second end portion;
- a bit line contact node on a sidewall, an upper surface, and a lower surface of the first end portion;
- a bit line coupled to the bit line contact node and extended perpendicular to the substrate;
- a storage contact node on a sidewall, an upper surface, and a lower surface of the second end portion;
- and
- a capacitor coupled to the second end portion and the storage contact node.
5 more elements
A semiconductor device, comprising:
- a substrate including a peripheral circuit portion;
- a memory cell array including a bit line, including a contact pad side and a bonding pad side, and extended perpendicular to the substrate;
- a first bonding pad coupled to the bonding pad side of the bit line;
- a second bonding pad disposed on the peripheral circuit portion and coupled to the first bonding pad;
- a body dielectric layer covering the contact pad side of the bit line;
- and
- a conductive pad passing through the body dielectric layer and coupled to the contact pad side of the bit line, wherein the contact pad side of the bit line has a protruding shape to be disposed at a higher level than the memory cell array.
4 more elements
Dependencies are inferred from the claim text.