Semiconductor device and a manufacturing method

A method for manufacturing a semiconductor device, providing a substrate, wherein the substrate comprises a memory cell array area on a first surface and a peripheral circuit area, the peripheral circuit area comprises a transistor active area;

• forming word line trenches in the memory cell array area;
• filling the word line trenches with a word line conductive layer, wherein a surface of the word line conductive layer is flush with the first surface of the substrate;
• forming a photoresist layer on the first surface of the substrate, wherein the photoresist layer is patterned to protect a word line contact area of the word line conductive layer and to expose an area outside the word line contact area of the word line conductive layer;
• etching the word line conductive layer to form a word line conductive structure, wherein the photoresist layer is used as a mask, the area outside the word line contact area of the word line conductive layer exposed by the photoresist layer is etched to a target depth, wherein the word line conductive structure comprises a first conductive structure located in the word line contact area and a second conductive structure located in the area outside the word line contact area, the first conductive structure of the word line conductive structure has a thickness greater than a thickness of the second conductive structure of the word line conductive structure, and a surface of the word line contact area is flush with the first surface of the substrate, a surface of the word line conductive structure is lower than the first surface of the substrate;
• removing the photoresist layer;
• forming an insulating dielectric layer on the first surface of the substrate, wherein the insulating dielectric layer comprises a first insulating dielectric layer on the surface of the word line conductive structure and a second insulating dielectric layer on a surface of the transistor active area, wherein a surface of the first insulating dielectric layer is flush with a surface of the second insulating dielectric layer, the first insulating dielectric layer and the second insulating dielectric layer are formed by a same process;
• and
• patterning the first insulating dielectric layer and the second insulating dielectric layer, forming a word line contact hole in the word line contact area and forming an active area contact hole in the transistor active area.