Semiconductor device and image processing system

An image processing system comprising:

• an image sensor configured to capture image of an object and generates image data of a plurality of channels, the plurality of channels including a first channel and a second channel;
• a memory storing the image data of the plurality of channels;
• an interface circuit configured to receive the image data of the plurality of channels and configured to output a plurality of packet including the image data of the plurality of channels;
• a channel composite circuit configured to receive the plurality of packets and configured to write the image data of the plurality of channels included in the plurality of packets into the memory;
• and
• an image signal processor (ISP) configured to perform a demosaicing processing for the image data of the plurality of channel stored in the memory or transmitted from the channel composite circuit,
• wherein the image data of the plurality of channels includes a plurality of line data, respectively,
• wherein the interface circuit is configured to output a first packet including a k-th line data included in an image data of the first channel, to output a second packet including a k-th line data included in an image data of the second channel after outputting the first packet,
• wherein the channel composite circuit is configured to transmit the k-th line data included in the image data of the first channel to the memory to store in a first address area and to transmit the k-th line data included in the image data of the second channel to the memory to store in a second address area following the first address area after the k-th line data included in the image data of the first channel is stored in the memory.