Track and hold circuit
AssigneeHuawei Technologies Co., Ltd.
InventorSemyon Lebedev
Life of this patent
Estimating the term…
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AssigneeHuawei Technologies Co., Ltd.
InventorSemyon Lebedev
Estimating the term…
Provided is a track and hold circuit. The track and hold circuit includes: a CMOS FVF; a pair of first switches, each of the first switches being coupled between a corresponding one of differential signal inputs and a corresponding one of differential inputs of the FVF; a second switch coupled between differential outputs of the FVF; the FVF includes a pair of first transistors with gates being differential inputs of the FVF and sources being the differential outputs of the FVF, a pair of second transistors, a first current mirror transistor, a second current mirror transistor and a third switch; where a state of the second switch is controlled by a clock signal to be the same as a state of the first switches, and a state of the third switch is controlled to be complementary to the state of the second switch.
A track and hold circuit, comprising:
Dependencies are inferred from the claim text.