Broadband Doherty power amplifier and implementation method thereof

A broadband Doherty power amplifier, comprising:

• a power divider;
• a carrier power amplifier circuit;
• a peak power amplifier circuit;
• and
• a load modulation network;
• wherein an input terminal of the power divider serves as an input terminal of the broadband Doherty power amplifier;
• two output terminals of the power divider are respectively connected to an input terminal of the carrier power amplifier circuit and an input terminal of the peak power amplifier circuit;
• wherein an output terminal of the carrier power amplifier circuit is connected to a first input terminal of the load modulation network;
• an output terminal of the peak power amplifier circuit is connected to a second input terminal of the load modulation network;
• and an output terminal of the load modulation network serves as an output terminal of the broadband Doherty power amplifier, for connecting to a system load;
• wherein the carrier power amplifier circuit comprise a carrier input matching circuit, a carrier power amplifier, and a carrier output matching circuit that are sequentially connected in series;
• wherein an input terminal of the carrier input matching circuit is connected to a first one of the two output terminals of the power divider, and an output terminal of the carrier output matching circuit is connected to the first input terminal of the load modulation network;
• wherein the peak power amplifier circuit comprises a peak input matching circuit, a peak power amplifier, and a peak output matching circuit that are sequentially connected in series;
• wherein an input terminal of the peak input matching circuit is connected to a second one of the two output terminals of the power divider, and an output terminal of the peak output matching circuit is connected to the second input terminal of the load modulation network;
• wherein a resistance value of the system load is ZL;
• wherein the power divider is configured to respectively allocate power to the carrier power amplifier circuit and the peak power amplifier circuit according to a power division ratio of 1:n;
• wherein the carrier input matching circuit is configured to match a terminal impedance of the input terminal of the carrier input matching circuit to an input impedance of the carrier power amplifier, and the carrier output matching circuit is configured to match the resistance value ZL of the system load to an output impedance of the carrier power amplifier;
• an output impedance of the carrier output matching circuit is Zm, and a following formula is satisfied:
• Zm=ZL(n+1);
• wherein n is a positive number;
• wherein the peak input matching circuit is configured to match a terminal impedance of the input terminal of the peak input matching circuit to an input impedance of the peak power amplifier, and the peak output matching circuit is configured to match the resistance value ZL of the system load to an output impedance of the carrier power amplifier;
• an output impedance of the peak output matching circuit is Zp, and a following formula is satisfied:
• Zp=ZL(n+1)/n;
• and
• wherein the load modulation network is configured to perform power combination on an output signal of the carrier output matching circuit and an output signal of the peak input matching circuit, and is configured to set an impedance ZQ of a power amplifier combination point, wherein a resistance value of the impedance ZQ is ZL.