Uniform GIDL current during NAND erase

A method for operating a non-volatile memory system, the method comprising:

• accessing die dependent voltages for gates of source select transistors on NAND strings from storage in the non-volatile memory system, wherein the die dependent voltages are tailored to a physical characteristic of source side select transistors of the NAND strings in different semiconductor dies of the non-volatile memory system, the die dependent voltages include a first die dependent gate voltage having a first magnitude for the source side select transistors in a first semiconductor die of the non-volatile memory system and a second die dependent gate voltage having a second magnitude for the source side select transistors in a second semiconductor die of the non-volatile memory system, wherein the second magnitude is different from the first magnitude to compensate for a difference in the physical characteristic between the source side select transistors of the NAND strings in the first semiconductor die and the second semiconductor die;
• applying the first die dependent gate voltage having the first magnitude to gates of first source side select transistors on a first group of NAND strings in the first semiconductor die while applying a first erase voltage to a first source line connected to the first group of the NAND strings during a first gate-induced drain leakage (GIDL) erase of the first group of the NAND strings, the first source side select transistors immediately adjacent to the first source line;
• and
• applying the second die dependent gate voltage having the second magnitude to gates of second source side transistors on a second group of NAND strings in the second semiconductor die while applying a second erase voltage to a second source line connected to the second group of the NAND strings during a second GIDL erase of the second group of the NAND strings, the second source side transistors immediately adjacent to the second source line, wherein the second magnitude is different from the first magnitude, wherein the first erase voltage has the same magnitude as the second erase voltage.

A storage system comprising:

• non-volatile storage;
• a first source line;
• a first group of NAND strings in a first region of the storage system, the first group of NAND strings each having a first source side transistor having a drain connected to the first source line, each first source side transistor having a gate;
• a second source line;
• a second group of NAND strings in a second region of the storage system, the second group of NAND strings each having a second source side transistor having a drain connected to the second source line, each second source side transistor having a gate;
• and
• one or more control circuits in communication with the first group of NAND strings, the first source line, the second group of NAND strings, the second source line, and the non-volatile storage, the one or more control circuits configured to:
• trim a first gate-induced drain leakage (GIDL) current generation voltage for the first source side transistors based on first source side GIDL erases of the first group of the NAND strings, including select a first magnitude for the first GIDL current generation voltage from applying and evaluating candidate magnitudes for the first GIDL current generation voltage;
• trim a second GIDL current generation voltage for the second source side transistors based on second source side GIDL erases of the second group of the NAND strings, including select a second magnitude for the second GIDL current generation voltage from a applying and evaluating candidate magnitudes for the second GIDL current generation voltage, wherein the second magnitude for the second GIDL current generation voltage has a different magnitude than the first magnitude for the first GIDL current generation voltage;
• store a first value for the first magnitude for the first GIDL current generation voltage and a second value for the second magnitude for the second GIDL current generation voltage in the non-volatile storage;
• repeatedly use the first magnitude for the first GIDL current generation voltage when erasing NAND strings in the first region of the storage system;
• and
• repeatedly use the second magnitude for the first GIDL current generation voltage when erasing NAND strings in the second region of the storage system.