Operating method of memory controller, and memory device

An operating method of a memory controller of a memory device, the operating method comprising:

• determining that a logical operation is to be performed on a first cell and a second cell by the memory device, wherein the logical operation comprises an AND operation or an OR operation;
• copying data of the first cell, the second cell, and a third cell into a fourth cell, a fifth cell, and a sixth cell, respectively;
• and
• sensing an output value of the logical operation based on a voltage formed in a bit line connected to the first cell and to the sixth cell.

A memory device comprising:

• a plurality of wordlines;
• a bit line connected to at least one activated wordline among the plurality of wordlines;
• a bit line bar configured to transfer inversion data of the bit line;
• a sense amplifier configured to sense data of the bit line and data of the bit line bar;
• and
• a pre-charge unit configured to pre-charge the bit line and the bit line bar, wherein the pre-charge unit is configured to form a reference voltage between a first voltage corresponding to data of a cell and a second voltage corresponding to the inversion data of the data of the cell by pre-charging the bit line,
• wherein the memory device is configured to form, in the bit line, a third voltage between the second voltage and the reference voltage by connecting the bit line and the bit line bar, and
• wherein the memory device is configured to perform a NOT operation based on the inversion data.

A method comprising:

• storing data in a first cell connected to a sense amplifier via a bit line of the first cell;
• storing inversion data in a second cell connected to the sense amplifier via a bit line bar of the first cell;
• determining that a NOT operation is to be performed on the data of the first cell;
• forming a voltage in the bit line based on the inversion data;
• and
• performing the NOT operation by sensing the voltage in the bit line using the sense amplifier.