Pixel circuit and display device including the same

A pixel circuit comprising:

• a driving transistor including a gate electrode connected to a first node, a first electrode connected to a second node, and a second electrode connected to a third node;
• a light-emitting element including an anode electrode to which a pixel driving voltage is applied and a cathode electrode connected to the second node;
• a first capacitor connected to the first node and a fourth node;
• a first-first switch transistor connected to a data line to which a data voltage is applied and the fourth node, the first-first switch transistor configured to be turned on in response to a pulse of a fourth scan signal;
• a first-second switch transistor connected to the data line and the fourth node, the first-second switch transistor configured to be turned on in response to a pulse of a third scan signal that is input prior to the pulse of the fourth scan signal;
• a second-first switch transistor connected to the first node and the third node, the second-first switch transistor configured to be turned on in response to the pulse of the fourth scan signal;
• and
• a second-second switch transistor connected to the first node and the third node, the second-second switch transistor configured to be turned on in response to the pulse of the third scan signal.

A display device comprising:

• a display panel including a plurality of data lines, a plurality of gate lines, a plurality of power lines, and a plurality of sub-pixels;
• a data driver configured to output a data voltage to the plurality of data lines;
• and
• a gate driver configured to output a scan signal to the plurality of gate lines,
• wherein each of the plurality of sub-pixels includes:
• a light-emitting element;
• a driving transistor electrically connected to the light-emitting element;
• a first-first switch transistor connected to a gate electrode of the driving transistor and a data line from the plurality of data lines to which the data voltage is applied, the first-first switch transistor configured to be turned on in response to a pulse of a second scan signal;
• and
• a first-second switch transistor connected to the gate electrode of the driving transistor and the data line, the first-second switch transistor configured to be turned on in response to a pulse of a first scan signal that is input prior to the pulse of the second scan signal,
• wherein:
• the gate electrode of the driving transistor is connected to a first node,
• the driving transistor includes a first electrode connected to a second node and a second electrode to which a ground voltage is applied,
• the light-emitting element includes an anode electrode to which a pixel driving voltage is applied, and a cathode electrode connected to the second node, and
• a voltage charging time of the first node is longer than a pulse width of each of the first scan signal and the second scan signal.

A display device comprising:

• a display panel including a plurality of data lines, a plurality of gate lines, a plurality of power lines, and a plurality of sub-pixels;
• a data driver configured to output a data voltage to the plurality of data lines;
• and
• a gate driver configured to output a scan signal to the plurality of gate lines,
• wherein each of the plurality of sub-pixels includes:
• a driving transistor including a gate electrode connected to a first node, a first electrode connected to a second node, and a second electrode connected to a third node;
• a light-emitting element including an anode electrode to which a pixel driving voltage is applied and a cathode electrode connected to the second node;
• a first capacitor connected to the first node and a fourth node;
• a first-first switch transistor connected to a data line from the plurality of data lines to which the data voltage is applied and the fourth node, the first- first switch transistor configured to be turned on in response to a pulse of a fourth scan signal;
• a first-second switch transistor connected to the data line and the fourth node, the first-second switch transistor configured to be turned on in response to a pulse of a third scan signal that is input prior to the pulse of the fourth scan signal;
• a second-first switch transistor connected to the first node and the third node, the second-first switch transistor configured to be turned on in response to the pulse of the fourth scan signal;
• a second-second switch transistor connected to the first node and the third node, the second-second switch transistor configured to be turned on in response to the pulse of the third scan signal;
• a third-first switch transistor connected to a first power line to which the pixel driving voltage is applied and the second node, the third-first switch transistor configured to be turned on in response to the pulse of the fourth scan signal;
• a third-second switch transistor connected to the first power line and the second node, the third-second switch transistor configured to be turned on in response to the pulse of the third scan signal;
• a fourth-first switch transistor connected to a third power line to which a reference voltage is applied and the third node, the fourth-first switch transistor configured to be turned on in response to a pulse of a second scan signal;
• and
• a fourth-second switch transistor connected to the third power line and the third node, the fourth-second switch transistor configured to be turned on in response to a pulse of a first scan signal that is input prior to the second scan signal.