Operating a secure code segment on a processor core of a processing unit

A computer system for operating a secure code segment on a processor core of a processing unit, wherein the processing unit is configured with at least one processor core, the computer system comprising at least one processor unit with at least one processor core, the processor core being configured to running a first execution mode for executing program code on at least one processor core and executing a program code of operating instructions on at least one processor core, wherein the computer system is configured to perform a method, at least comprising:

• requesting exclusive secure execution of a secure code segment of the program code on at least one processor core;
• saving at least an architectural state and a non-architectural state of a physical processor core;
• setting at least one processor core to exclusive secure execution for the secure code segment;
• executing the secure code segment on at least one processor core uninterruptably, wherein executing the secure code segment on at least one processor core uninterruptably is controlled by a state machine and defined for a minimum period of time and a minimum number of instructions, and wherein any interrupt is blocked during the execution of the secure code segment for undisturbed execution for the minimum period of time and the minimum number of instructions;
• wiping the non-architectural state of the physical processor core from at least one cache storage of the physical processor core, wherein the wiping of the non-architectural state of the physical processor core before execution of the secure code segment is performed in a hardware-controlled manner by hardware of the processing unit;
• restoring at least the architectural state and the non-architectural state of the physical core before setting the processor core to the first execution mode based on the architectural state and the non-architectural state previously saved;
• and
• setting at least one processor core to the first execution mode for executing program code on at least one processor core, wherein the first execution mode for executing program code on the processor core is a simultaneous multithreading mode.

A computer program product for operating a secure code segment on a processor core of a processing unit, wherein the processing unit is configured with at least one processor core for running a first execution mode for executing program code on at least one processor core and executing a program code of operating instructions on at least one processor core, the computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions executable by a computer system to cause the computer system to perform a method comprising:

• requesting exclusive secure execution of a secure code segment of the program code on at least one processor core;
• saving at least an architectural state and a non-architectural state of a physical processor core;
• setting at least one processor core to exclusive secure execution for the secure code segment;
• executing the secure code segment on at least one processor core uninterruptably, wherein executing the secure code segment on at least one processor core uninterruptably is controlled by a state machine and defined for a minimum period of time and a minimum number of instructions, and wherein any interrupt is blocked during the execution of the secure code segment for undisturbed execution for the minimum period of time and the minimum number of instructions;
• wiping the non-architectural state of the physical processor core from at least one cache storage of the physical processor core, wherein the wiping of the non-architectural state of the physical processor core before execution of the secure code segment is performed in a hardware-controlled manner by hardware of the processing unit;
• restoring at least the architectural state and the non-architectural state of the physical core before setting the processor core to the first execution mode based on the architectural state and the non-architectural state previously saved;
• and
• setting at least one processor core to the first execution mode for executing program code on at least one processor core, wherein the first execution mode for executing program code on the processor core is a simultaneous multithreading mode.