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US 12,602,333 B2Granted
Secure element and electronic device including the same
AssigneeSamsung Electronics Co., Ltd.
InventorsSunghyun Kim, Keunyoung Park
Life of this patent
Estimating the term…
Abstract
A secure element (SE) coupled to a system-on-chip (SoC) includes an internal memory, virtual secure direct memory access (DMA) circuitry configured to perform a secure operation using an external memory connected to the SoC in association with the internal memory, and SE interface circuitry configured to output secure data and a write request generated by the virtual secure DMA circuitry to the SoC, the secure data being stored in the external memory.
Claims19
A secure element (SE) coupled to a system-on-chip (SoC), the SE comprising:
- an internal memory;
- virtual secure direct memory access (DMA) circuitry configured to
- perform a secure operation using an external memory connected to the SoC in association with the internal memory,
- perform a hash operation using a hash key on a first packer including first data and an anti-replay counter (ARC) to generate a first tag and
- perform an encryption operation using an encryption key on a second packet including the first tag and the first data to generate first secure data;
- and
- SE interface circuitry configured to output the first secure data and a write request generated by the virtual secure DMA circuitry to the SoC,
- the first secure data being stored in the external memory.
5 more elements
An electronic device comprising:
- an external memory;
- a system-on-chip (SoC) coupled to the external memory;
- and
- a first secure element (SE) coupled to the SoC,
- the first SE including:
- an internal memory;
- a memory management unit configured to determine whether an available page exists in the internal memory using a translation lookaside buffer;
- first SE interface circuitry configured to transmit first secure data to the SoC to write the first secure data to the external memory based an a result of the determination and receive the first secure data read from the external memory, from the SoC;
- and
- first virtual secure DMA circuitry configured to generate the first secure data based on a set anti-replay counter (ARC) and a hash key and an encryption key read from a non-volatile memory of the first SE and perform a verification operation on the first secure data.
7 more elements
An electronic device comprising:
- a first external memory;
- a second external memory;
- a first integrated circuit (IC) coupled to the first external memory;
- and
- a second IC coupled to the second external memory,
- the first IC including:
- first interface circuitry configured to transmit first secure data to the second IC to write the first secure data to the second external memory and receive the first secure data read from the second external memory, from the second IC;
- and
- first virtual secure direct memory access (DMA) circuitry configured to
- perform a hash operation using a hash key on a first packet including first data and a set anti-replay counter (ARC) to generate a first tag,
- perform an encryption operation using an encryption key on a second packet including the first tax and the first data to generate the first secure data in a generation operation, and
- perform a verification operation on the first secure data.
9 more elements
Dependencies are inferred from the claim text.