Circuitry for routing and delay correction in a multi-functional unit system

A device comprising:

• a first functional unit of a set of functional units, the first functional unit comprising:
• processing circuitry;
• and
• a first delay circuit located within the first functional unit and coupled to the processing circuitry, wherein the first delay circuit comprises a plurality of delay components, and wherein the first delay circuit is to:
• receive a message from a second functional unit of the set of functional units;
• and
• delay the message for the processing circuitry for a predetermined duration using a number of the delay components, wherein the predetermined duration is based at least in part on a first value representing a first distance between the first functional unit and the second functional unit and a second value representing a second distance between the second functional unit and a functional unit of the set of functional units that is farthest away from the second functional unit.

A method of operating an integrated circuit with a set of functional units, the method comprising:

• receiving, at a first delay circuit located within a first functional unit, a message from a second functional unit;
• delaying, using a number of delay components of the first delay circuit, the message for a predetermined duration for first processing circuitry of the first functional unit, wherein the predetermined duration is based at least in part on a first value representing a first distance between the first functional unit and the second functional unit and a second value representing a second distance between the second functional unit and a functional unit of the set of functional units that is farthest away from the second functional unit;
• and
• processing, using the first processing circuitry, the message after the predetermined duration.