Hardware resource allocation system for allocating resources to threads

A method, comprising:

• maintaining, by a resource allocation management circuit of a processor, a set of thread allocation maps that indicate amounts of different types of hardware resources allocated to a thread;
• receiving, by the resource allocation management circuit, one or more resource allocation requests to allocate specified amounts of the different types of hardware resources to a first thread to utilize when executed;
• based on the maintained set of thread allocation maps, the resource allocation management circuit identifying a second thread for deallocation that has been allocated hardware resources corresponding to at least one of the different types of hardware resources;
• sending, by the resource allocation management circuit, deallocation requests to deallocate a set of hardware resources corresponding to the at least one different type of hardware resource that are allocated to the second thread;
• sending, by the resource allocation management circuit, allocation requests to allocate, using at least a portion of the set of deallocated hardware resources, the specified amounts of the different types of hardware resources to the first thread, wherein at least one of the allocation requests is sent to a hardware resource allocation circuit that is configured to:
• update a resource allocation map managed by the hardware resource allocation circuit to allocate, to the first thread, a number of portions of a hardware resource managed by the hardware resource allocation circuit;
• and
• return an allocation response to the resource allocation management circuit;
• updating, by the resource allocation management circuit, the set of thread allocation maps to indicate an allocation of the specified amounts of the different types of hardware resources to the first thread;
• and
• executing, by a pipeline circuit of the processor, the first thread to utilize the allocated specified amounts of the different types of hardware resources.

A non-transitory computer readable storage medium having stored thereon design information that specifies a circuit design in a format recognized by a fabrication system that is configured to use the design information to fabricate a hardware integrated circuit that includes:

• a plurality of hardware resource allocation circuits configured to collectively allocate different types of hardware resources to threads;
• a memory device configured to store a thread allocation map that indicates amounts of the different types of hardware resource allocated to a given thread of the threads;
• a resource allocation management circuit coupled to the memory device and configured to:
• receive a resource allocation request to allocate a specified amount of a hardware resource of the different types of hardware resources to a first thread to utilize when executed;
• identify, based on the thread allocation map, a second thread for deallocation that has been allocated an amount of the hardware resource;
• send a deallocation request to a hardware resource allocation circuit of the plurality of hardware resource allocation circuits to deallocate the amount of the hardware resource that has been allocated to the second thread;
• send an allocation request to the hardware resource allocation circuit to allocate the specified amount of the hardware resource to the first thread;
• and
• update the thread allocation map to indicate an allocation of the specified amount of the hardware resource to the first thread,
• wherein the hardware resource allocation circuit is configured to:
• update a resource allocation map managed by the hardware resource allocation circuit to allocate, to the first thread, a number of portions of the hardware resource managed by the hardware resource allocation circuit;
• and
• return an allocation response to the resource allocation management circuit that the specified amount of the hardware resource has been allocated;
• and
• wherein the hardware integrated circuit further includes a pipeline circuit configured to execute the first thread to utilize the allocated specified amount of the hardware resource.