Seamless update provisioning for common chipsets carrying different CPU families

A system for network management comprising:

• a plurality of silicon data processing devices;
• a silicon management system operating on a processor that causes the processor to load one or more algorithms stored in a non-transient data memory to cause the processor to identify a version for the plurality of silicon data processing devices, wherein the silicon data processing devices are CPUs, using a CPU chipset protocol globally unique identifier (GUID) for each silicon data processing device;
• a chipset management system operating on a processor that causes the processor to load one or more algorithms stored in a non-transient data memory to cause the processor to identify a version for a plurality of chipsets, each chipset associated with one of the silicon data processing devices and having a plurality of associated drivers, using a physical presence interface (PPI) protocol;
• the chipset management system further causing the processor to use the PPI to map a higher generation silicon data processing device identifier to the drivers of a lower generation chipset and to implement an update to each of the drivers of one or more of the chipsets based on the mapping;
• the silicon management system further causing the processor to implement an update to one or more of the silicon data processing devices using the GUID for the silicon data processing device and the mapping;
• and
• a boot system configured to cause a system associated with the updated silicon data processing devices and the updated chipsets to reboot.